• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1929-1930
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• 2008

This research is about the remote control of the infra-ray signal producer and the received signal memory-type control unit. Also by using the infra-ray signal from the remote control, reduction of malfunctions due to infra-ray signal from other devices are presented. Applications on various electric and electronic items to improve the convenience are also shown.

• The KIPS Transactions:PartA
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• v.19A no.1
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• pp.35-44
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• 2012

Traditional technologies that are used to improve the performance of hard disk drives show many negative cases if they are applied to solid state drives (SSD). Access time and block sequence in hard disk drives that consist of mechanical components are very important performance factors. Meanwhile, SSD provides superior random read performance that is not affected by block address sequence due to the characteristics of flash memory. Practically, it is recommended to disable prefetching if a SSD is installed in a personal computer. However, this paper presents a combinational method of a prefetching scheme and a memory management that consider the internal structure of SSD and the characteristics of NAND flash memory. It is important that SSD must concurrently operate multiple flash memory chips. The I/O unit size of NAND flash memory tends to increase and it exceeded the block size of operating systems. Hence, the proposed prefetching scheme performs in an operating unit of SSD. To complement a weak point of the prefetching scheme, the proposed memory management scheme adaptively evicts uselessly prefetched data to maximize the sum of cache hit rate and prefetch hit rate. We implemented the proposed schemes as a Linux kernel module and evaluated them using a commercial SSD. The schemes improved the I/O performance up to 26% in a given experiment.

• Journal of Digital Contents Society
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• v.9 no.1
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• pp.77-86
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• 2008

False sharing is a result of co-location of unrelated data in the same unit of memory coherency, and is one source of unnecessary overhead being of no help to keep the memory coherency in multiprocessor systems. Moreover, the damage caused by false sharing becomes large in proportion to the granularity of memory coherency. To reduce false sharing in page-based DSM systems, it is necessary to allocate unrelated data objects that have different access patterns into the separate shared pages. In this paper we propose sized and call-site tracing-based shared memory allocator, shortly SCSTallocator. SCSTallocator places each data object requested from the different call-sites into the separate shared pages, and at the same time places each data object that has different size into different shared pages. Consequently data objects that have the different call-site and different object size prohibited from being allocated to the same shared page. Our observations show that our SCSTallocator outperforms the existing dynamic shared memory allocators. By combining the two existing allocation technique, we can reduce a considerable amount of false sharing misses.

• Journal of the Korean Society for Heat Treatment
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• v.3 no.1
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• pp.34-41
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• 1990

Effects of grain size and cold rolling degree on shape memory ability and transformation temperature were studied in Fe-35% Mn-6% Si shape memory alloy. Md point of the alloy was determined by variation of yield stress with test temperature. The Md point measured in this way was linearly increased with increasing grain size. Shape memory ability of the alloy was decreased with increasing grain size, showing a minimum value at around $63{\mu}m$, and then increased with increasing grain size. From this result, it was concluded that the shape memory ability in the grain size smaller than a critical value is controlled by amount of retained ${\gamma}$ and prior ${\varepsilon}$ phase, but that the shape memory ability in the grain size greater than the critical value is mainly dominated by grain boundary area in unit volume of parent phase. The shape memory ability was decreased with increasing deformation degree. This was because the ${\gamma}$ content being available for the formation of ${\varepsilon}$ martensite during bending was decreased with increasing deformation degree.

• The KIPS Transactions:PartD
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• v.14D no.7
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• pp.719-726
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• 2007

Recently, NAND flash memory has been used for a storage device in various mobile computing devices such as MP3 players, mobile phones and laptops because of its shock-resistant, low-power consumption, and none-volatile properties. However, due to the very distinct characteristics of flash memory, disk based systems and applications may result in severe performance degradation when directly adopting them on flash memory storage systems. Especially, when a B-tree is constructed, intensive overwrite operations may be caused by record inserting, deleting, and its reorganizing, This could result in severe performance degradation on NAND flash memory. In this paper, we propose an efficient buffer management scheme, called IBSF, which eliminates redundant index units in the index buffer and then delays the time that the index buffer is filled up. Consequently, IBSF significantly reduces the number of write operations to a flash memory when constructing a B-tree. We also show that IBSF yields a better performance on a flash memory by comparing it to the related technique called BFTL through various experiments.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.2
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• pp.87-96
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• 2019

Low power issue is one of the most critical problems in the Internet of Things (IoT), which are powered by battery. To solve this problem, various approaches have been presented so far. In this paper, we propose a method to reduce the power consumption by reducing the numbers of accesses into the flash memory consuming a large amount of power for on-chip software execution. Our approach is based on using cooperative logging structure to distribute the sampling overhead in single sensor node to adjacent nodes in case of rare-event applications. The proposed algorithm to identify event occurrence is newly introduced with negative feedback method by observing difference between past data and recent data coming from the sensor. When an event with need of flash access is determined, the proposed approach only allows access to write the sampled data in flash memory. The proposed event detection algorithm (EDA) result in 30% reduction of power consumption compared to the conventional flash write scheme for all cases of event. The sampled data from the sensor is first traced into the random access memory (RAM), and write access to the flash memory is delayed until the page buffer of the on-chip flash memory controller in the micro controller unit (MCU) is full of the numbers of the traced data, thereby reducing the frequency of accessing flash memory. This technique additionally reduces power consumption by 40% compared to flash-write all data. By sharing the sampling information via LoRa channel, the overhead in sampling data is distributed, to reduce the sampling load on each node, so that the 66% reduction of total power consumption is achieved in several IoT edge nodes by removing the sampling operation of duplicated data.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.1
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• pp.155-160
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• 1996

In this paper, we consider the discrete-time known signal detection problem under the presence of additive noise exhibiting weak dependence. We derive the locally optimum, memoryless, and one-memory detector test statistics under a seakly dependent noise model. The performance characteristics of the one-memory detector can achieve almost optimum performance at the expense of only one memory unit under the weakly dependent noise model.

• 한국전산유체공학회:학술대회논문집
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• 2005.04a
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• pp.100-103
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• 2005

This work discusses the numerical analysis, the design and experimental test of the SMA (Shape Memory Alloy) actuator along with its capabilities and limitations. Convection heating and cooling using water actuate the SMA element of the actuator. The fuel such as propane, having a high energy density, is used as the energy source for the SMA actuator in order to increase power and energy density of the system, and thus in order to obviate the need for electrical power supplies such as batteries. The system is composed of a pump, valves, bellows, a heater (burner), control unit and a displacement amplification device. The actuation frequency is compared with the prediction obtained from numerical analysis. For the designed SMA actuator system, the results of numerical analysis were utilized in determining design parameters and operating conditions.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.8
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• pp.309-315
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• 1986

We proposed a preliminary Data Flow Machine Model(DNL1) operating on the basis of Node Label. In this model, all the PMs(Processing Modules) were synchronized with the content of LC(Level Counter) and were not implemented dy the processing cability on conditional nodes. This paper presents an architecture of a concurrent multiprocessor system which was developed from DNL1 with two additional types of memories, CF(Control Flag) and ETF (Enabled Token Flag). The CF memory holds the control condition flag ('1' or '0') to be referenced to when a node is fired and the ETF represents the firability of a certain node. Firable nodes are fetched to the PU(Processing Unit) and processed. This Data Flow system can be extended hierarchically by a network of simple modules. The principle working elements of the machine are a set of PMs, each of which performs the execution of the data flow procedures held in a local memory, NTM(Node Token Memory) within the PM.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4A
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• pp.328-335
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• 2005

bIn this paper, built-in self-repair(BISR) is proposed for semiconductor memories. BISR is consisted of BIST(Buit-in self-test) and BIRU(Built-In Remapping Uint). BIST circuits are required not oがy to detect the presence of faults but also to specify their locations for repair. The memory rows are virtually divided into row blocks and reconfiguration is performed at the row block level instead of the traditional row level. According to the experimental result, we can verify algorithm for replacement of faulty cell.