• Journal of Korea Multimedia Society
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• v.12 no.1
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• pp.16-25
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• 2009

In the car environment that the first priority is a safety problem, the large vocabulary isolated word recognition system with POI domain is required as the optimal HMI technique. For the telematics terminal with a highly limited processing time and memory capacity, it is impossible to process more than 100,000 words in the terminal by the general speech recognition methods. Therefore, we proposed phoneme recognizer using the phonetic GMM and also PDM Levenshtein distance with multi-layer architecture for the POI recognition of telematics terminal. By the proposed methods, we obtained high performance in the telematics terminal with low speed processing and small memory capacity. we obtained the recognition rate of maximum 94.8% in indoor environment and of maximum 92.4% in the car navigation environments.

• The Journal of the Korea Contents Association
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• v.9 no.11
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• pp.90-99
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• 2009

This paper presents the implementation of RFID EPC global network educational system based on using 900MHz air interface between the reader and the active tag. The software of reader and the active tag is developed on embedded environment, and the software of PC controlling the reader is based on window OS operated as the server. The ATmega128 VLSI chip is used for the processor of the reader and the active tag. As the development environment, AVR compiler is used for the reader and the active tag of which the programming language is C. The visual C++language of the visual studio on the PC activated as the server is used for development language. Main functions of this system are to control tag containing EPC global Data by PC through the reader, to obtain information of tag through the internet and to read/write data on tag memory. Finally the data written from the active tag's memory is sent to the PC via the reader as "read" operation and compare the received data with one already sent to the tag. Software implementation of 900MHz EPC global RFID educational system is done on the basis of these functions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.3 s.357
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• pp.43-51
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• 2007

OneNAND flash combines the advantages of NAND and NOR flash, and has become an alternative to the former. But the advanced features of OneNAND flash are not utilized effectively in demand paging systems designed for NAND flash. We propose delayed dual buffering, a demand paging system which fully exploits the random-access I/O interface and dual page buffers of OneNAND flash demand paging system. It effectively reduces the time of page transfer from the OneNAND page buffer to the main memory. On average, it achieves and 28.5% reduction in execution time and 4.4% reduction in paging system energy consumption.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.11
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• pp.1754-1766
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• 1993

The application of VXIbus system, an Industry standard, is rapidly spreading with its ability to offer the easiness of integration from GPIB and the fast data transmission from VMEbus system. Compared with VXIbus Register Based Device, VXIbus Message Based Device has a drawback In the aspect of speed. But it is possible to utilize high level ASCII commands to control a Message Based Device, therefore system integration is much easier with Message Based Device than with Register Based Device. And, the FFT analyzer is an instrument for signal analysis which can be inexpensively implemented to be fast and have high resolution. Its wide ability of analysis presents numerous application. So, it is necessary to apply VXIbus system to FFT analyzer. In this paper, the implementation of FFT analyzer is performed using a DSP module and by implementing all A/D conversion circuit and a control module which performs VXIbus interface. The device can be controlled by Slot0 Commender which supports VXIbus Shared Memory Protocol through VXIbus.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.647-650
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• 2006

Low temperature polycrystalline silicon (LTPS) technology using a high power laser have been widely applied to thin film transistors (TFTs) for liquid crystal, organic light emitting diode (OLED) display, driver circuit for system on glass (SOG) and static random access memory (SRAM). Recently, the semiconductor industry is continuing its quest to create even more powerful CPU and memory chips. This requires increasing of individual device speed through the continual reduction of the minimum size of device features and increasing of device density on the chip. Moreover, the flat panel display industry also need to be brighter, with richer more vivid color, wider viewing angle, have faster video capability and be more durable at lower cost. Kornic Systems Co., Ltd. developed the $KORONA^{TM}$ LTP/GLTP series - an innovative production tool for fabricating flat panel displays and semiconductor devices - to meet these growing market demands and advance the volume production capabilities of flat panel displays and semiconductor industry. The $KORONA^{TM}\;LTP/GLTP$ series using DPSS laser and XeCl excimer laser is designed for the new generation of the wafer & FPD glass annealing processing equipment combining advanced low temperature poly-silicon (LTPS) crystallization technology and object-oriented software architecture with a semistandard graphical user interface (GUI). These leading edge systems show the superior annealing ability to the conventional other method. The $KORONA^{TM}\;LTP/GLTP$ series provides technical and economical benefits of advanced annealing solution to semiconductor and FPD production performance with an exceptional level of productivity. High throughput, low cost of ownership and optimized system efficiency brings the highest yield and lowest cost per wafer/glass on the annealing market.

• Journal of Broadcast Engineering
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• v.16 no.3
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• pp.403-415
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• 2011

In this paper, we proposed a hardware architecture to generate digital holograms at high speed. It used the modified computer-generated hologram (CGH) algorithm and adapted the pipeline-based hardware to be able to remove memory bottleneck problem. It uses not the method which generates a hologram by accumulating intermittent holograms but the one which independently generates a pixel of a final hologram and uses the appropriate CGH algorithm for the selected method. Based on the CGH algorithm we proposed the architecture of the digital hologram generator which consists of input interface part, calculating part, and normalizing part. The hardware can decrease memory usage because it repeatedly use object light sources which is stored in the internal buffer. It is also operationally parallelized by vertically adding unit cells. It can generate 86 frames of HD digital hologram per 1 second for 1K light sources.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.174-174
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• 2014

Memristor devices are one of the most promising candidate approaches to next-generation memory technologies. Memristive switching phenomena usually rely on repeated electrical resistive switching between non-volatile resistance states in an active material under the application of an electrical stimulus, such as a voltage or current. Recent reports have explored the use of variety of external operating parameters, such as the modulation of an applied magnetic field, temperature, or illumination conditions to activate changes in the memristive switching behaviors. Among these possible choices of signal controlling factors of memristor, photon is particularly attractive because photonic signals are not only easier to reach directly over long distances than electrical signal, but they also efficiently manage the interactions between logic devices without any signal interference. Furthermore, due to the inherent wave characteristics of photons, the facile manipulation of the light ray enables incident light angle controlled memristive switching. So that, in the tautological sense, device orienting position with regard to a photon source determines the occurrence of memristive switching as well. To demonstrate this position controlled memory device functionality, we have fabricated a metal-semiconductor-metal memristive switching nanodevice using ZnO nanorods. Superhydrophobicity employed in this memristor gives rise to illumination direction selectivity as an extra controlling parameter which is important feature in emerging. When light irradiates from a point source in water to the surface treated device, refraction of light ray takes place at the water/air interface because of the optical density differences in two media (water/air). When incident light travels through a higher refractive index medium (water; n=1.33) to lower one (air; n=1), a total reflection occurs for incidence angles over the critical value. Thus, when we watch the submerged NW arrays at the view angles over the critical angle, a mirror-like surface is observed due to the presence of air pocket layer. From this processes, the reversible switching characteristics were verified by modulating the light incident angle between the resistor and memristor.

• Korean Journal of Materials Research
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• v.20 no.5
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• pp.257-261
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• 2010

A non-volatile resistive random access memory (RRAM) device with a Cr-doped $SrZrO_3/SrRuO_3$ bottom electrode heterostructure was fabricated on $SrTiO_3$ substrates using pulsed laser deposition. During the deposition process, the substrate temperature was $650^{\circ}C$ and the variable ambient oxygen pressure had a range of 50-250 mTorr. The sensitive dependences of the film structure on the processing oxygen pressure are important in controlling the bistable resistive switching of the Cr-doped $SrZrO_3$ film. Therefore, oxygen pressure plays a crucial role in determining electrical properties and film growth characteristics such as various microstructural defects and crystallization. Inside, the microstructure and crystallinity of the Cr-doped $SrZrO_3$ film by oxygen pressure were strong effects on the set, reset switching voltage of the Cr-doped $SrZrO_3$. The bistable switching is related to the defects and controls their number and structure. Therefore, the relation of defects generated and resistive switching behavior by oxygen pressure change will be discussed. We found that deposition conditions and ambient oxygen pressure highly affect the switching behavior. It is suggested that the interface between the top electrode and Cr-doped $SrZrO_3$ perovskite plays an important role in the resistive switching behavior. From I-V characteristics, a typical ON state resistance of $100-200\;{\Omega}$ and a typical OFF state resistance of $1-2\;k{\Omega}$, were observed. These transition metal-doped perovskite thin films can be used for memory device applications due to their high ON/OFF ratio, simple device structure, and non-volatility.

• Journal of Internet Computing and Services
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• v.8 no.4
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• pp.51-59
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• 2007

This paper presents the development of RFID educational system based on using 900MHz air interface between the reader and the active tag. The software of reader and the active tag is developed on embedded environment, and the software of PC controlling the reader is based on window OS operated as the server. The AT89C51ED2 VLSI chip is used for the processor of the reader and the active tag. As the development environment, Keil compiler is used for the reader and the active tag of which the programing language is C. The visual C language of the visual studio on the PC activated as the server is used for development language. To verify the function of the system, PC gets the tag's identification number through the reader and send the data to with the active tag memory a certain contents as "wite" operation. Finally the data written from the active tag's memory is sent to the PC via the reader as "read" operation and compare the received data with one already sent to the tag.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.1B
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• pp.59-66
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• 2012

The use of MPSoC has been increasing because of a rise of use of mobile devices and complex applications. For improving the performance of MPSoC, number of processor has been increasing. Standard MPI is used for efficiently sending data in distributed memory architecture that has advantage in multi processor. Standard In this paper, we propose a scalable distributed memory system with a low cost hardware message passing interface(MPI). The proposed architecture improves transfer rate with buffered send for small size packet. Three queues, Ready Queue, Request Queue, and Reservation Queue, work as previous architecture, and two queues, Small Ready Queue and Small Request Queue, are added to send small size packet. When the critical point is set 8 bytes, the proposed architecture takes more than 2 times the performance improvement in the data that below the critical point.