• Title/Summary/Keyword: memory interface

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Real time Shot Change Detection in focus of H/W prepare for DTV broadcasting (DTV방송에 대비한 H/W중심의 MPEG Bitstream에서의 실시간 장면변환 검출방법)

  • 장경훈;이동호
    • Proceedings of the IEEK Conference
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    • 2000.09a
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    • pp.725-728
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    • 2000
  • 본 논문에서는 영상검색 기법에서 핵심인 Shot Change Detection 과 Non Linear Browsing 을 H/W기반으로 구현하여, S/W 적으로는 비실시간으로만 가능하였던 video indexing 을 DTV 에 적용하여 실시간으로 구현하는 방법을 제시한다. 이를 위해 H/W part 는 실시간으로 들어오는 방송용 MPEG-2 bitstream 을 full decoding 이 아닌 최소화된 VLD(Variable Length Decoding) 수준의 parsing 으로 picture 내의 luminance와 chrominance 의 DC 값, macroblock type, motion vector 정보를 얻어내어 각각의 histogram을 계산하여 memory interface를 통해 S/W 측에 넘겨주게 되고 S/W 는 각 상황에 맞게 indexing algorithm 을 변화시키며 최적의 video indexing 방법으로 확장할 수 있도록 하였다.

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An Implementation of a High Speed Parallel DSP Boards using TMS320C6701 (TMS320C6701기반의 고속 병렬신호처리보드의 설계 및 구현)

  • 김진호;전창호;박성주;이동호
    • Proceedings of the IEEK Conference
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    • 2000.09a
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    • pp.501-504
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    • 2000
  • 근본적으로 방대한 양의 실시간 연산을 요구하는 영상 신호처리, 소나, 레이다와 같은 시스템에서는 시스템의 성능을 최대화하기 위해 병렬 신호처리 시스템의 사용이 불가피하다. 본 논문은 방대한 양의 데이터를 실시간으로 처리할수 있는 병렬 신호처리보드를 설계 및 구현하였다. 이 보드는 DSP칩간의 통신과 보드간의 통신이 가능하며, DSP칩이 마스터가 되어 EMIF(External Memory Interface Port)포트를 통해 다른 DSP칩의 지역메모리를 액세스 할수 있다. 또한 외부의 호스트 프로세서가 보드 내의 DSP칩에 프로그램을 다운로딩 할수 있다. 보드간의 통신은 PCI 버스를 통하여 이루어지며, DSP칩간의 통신과 DSP칩과 그의 지역메모리와의 통신은 지역버스를 통해 직접적으로 이루어진다. 보드에서 가장 핵심인 DSP-to-PCI제어기는 하드웨어 언어인 VHDL로 설계하였으며, 시뮬레이션 환경은 Synopsys & ALTERA MaxplusⅡ를 사용하여 검증하였으며, 최종적으로 CPLD(Complex Programable Logic Device)칩을 사용하여 구현하였다.

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Implementation of Vocabulary- Independent Speech Recognizer Using a DSP (DSP를 이용한 가변어휘 음성인식기 구현에 관한 연구)

  • Chung, Ik-Joo
    • Speech Sciences
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    • v.11 no.3
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    • pp.143-156
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    • 2004
  • In this paper, we implemented a vocabulary-independent speech recognizer using the TMS320VC33 DSP. For this implementation, we had developed very small-sized recognition engine based on diphone sub-word unit, which is especially suited for embedded applications where the system resources are severely limited. The recognition accuracy of the developed recognizer with 1 mixture per state and 4 states per diphone is 94.5% when tested on frequently-used 2000 words set. The design of the hardware was focused on minimal use of parts, which results in reduced material cost. The finally developed hardware only includes a DSP, 512 Kword flash ROM and a voice codec. In porting the recognition engine to the DSP, we introduced several methods of using data and program memory efficiently and developed the versatile software protocol for host interface. Finally, we also made an evaluation board for testing the developed hardware recognition module.

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A Synchronous/Asynchronous Hybrid Parallel Power Iteration for Large Eigenvalue Problems by the MPMD Methodology (MPMD 방식의 동기/비동기 병렬 혼합 멱승법에 의한 거대 고유치 문제의 해법)

  • Park, Pil-Seong
    • The KIPS Transactions:PartA
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    • v.11A no.1
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    • pp.67-74
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    • 2004
  • Most of today's parallel numerical schemes use synchronous algorithms, where some processors that have finished their tasks earlier than others must wait at synchronization points for correct computation. Hence overall performance of the system is dependent upon the speed of the slowest processor. In this paper, we det·ise a synchronous/asynchronous hybrid algorithm to accelerate convergence of the solution for finding the dominant eigenpair of a large matrix, by reducing the idle times of faster processors using MPMD programming methodology.

Web Based Smart Home Automation Control System Design

  • Hwang, Eui-Chul
    • International Journal of Contents
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    • v.11 no.4
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    • pp.70-76
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    • 2015
  • The development of technology provides and increases security as well as convenience for humans. The development of new technology directly affects the standard of life thanks to smart home automatic control systems. This paper describes a door control, automatic curtain, home security (CCTV, fire, gas, safe, etc.), home control (energy, light, ventilation, etc.) and web-based smart home automatic controller. It also describes the use of ARM (Advanced RISC Machines) for automatic control of home equipment, a Multi-Axes Servo Controller using FPGA (Field Programmable Gate Array) and PLC (programmable logic controller). Additionally, it describes the development of a HTML editor using web auto control software. The tab loading time (7 seconds) is faster when using ARM-based web browser software instead of Chrome and Firefox is used because the browser has a small memory footprint (300M). This system is realized by web auto controller language which controls and uses PLCs that are easier than existing devices. This smart home automatic control technology can control smart home equipment anywhere and anytime and provides a remote interface through mobile equipment.

A Study on the Remote Method Connection using RMI in the Distributed Computing System (분산 환경 시스템에서 RMI를 이용한 원격 메소드 연결에 관한 연구)

  • 소경영;최유순;박종구
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.3
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    • pp.483-491
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    • 2001
  • In this paper, we design and implement of the remote method connection system using Java RMI in the distributed computing system. In pursuing this goal, we implement the dynamic method connection interface and API. And then we describe the dynamic memory management routine.

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Three Dimensional Adaptive Mesh Generator for Thermal Oxidation Simulation (열산화 공정 시뮬레이션을 위한 3차원 적응 메쉬 생성기 제작에 관한 연구)

  • 윤상호;이제희;윤광섭;원태영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1995.11a
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    • pp.48-51
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    • 1995
  • We have developed the three dimensional mesh generator for three dimensional process simulation using the FEM(Finite Element Method). Tetrahedron element construct the presented three dimensional mesh, which is suitable for the simulation of three dimensional behavior of the LOCOS. The simulation of thermal oxidation is one of the problem in scale downed semiconductor processes. As three dimensional simulators use the huge size of the memory, we use the efficient method that generates the new nodes inside the growing oxide and removes the nodes nearby the SiO2/Si interface in silicon. The resented three dimensional mesh generator was designed to be used in various process simulations, for instance thermal oxidation, silicidation, nitridation, ion implantation, diffusion, and so on.

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A vision-based robotic assembly system

  • Oh, Sang-Rok;Lim, Joonhong;Shin, You-Shik;Bien, Zeungnam
    • 제어로봇시스템학회:학술대회논문집
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    • 1987.10a
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    • pp.770-775
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    • 1987
  • In this paper, design and development experiences of a vision based robotic assembly system for electronic components are described. Specifically, the overall system consists of the following three subsystems each of which employs a 16 bit Preprocessor MC 68000 : supervisory controller, real-time vision system, and servo system. The three microprocessors are interconnected using the time shared common memory bus structure with hardwired bus arbitration scheme and operated as a master-slave type in which each slave is functionally fixed in view of software. With this system architecture, the followings are developed and implemented in this research; (i) the system programming language, called 'CLRC', for man-machine interface including the robot motion and vision primitives, (ii) real-time vision system using hardwired chain coder, (iii) the high-precision servo techniques for high speed de motors and high speed stepping motors. The proposed control system were implemented and tested in real-time successfully.

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A Study on Fast Thinning Unit Implementation of Binary Image (2진 영상의 고속 세선화 장치 구현에 관한 연구)

  • 허윤석;이재춘;곽윤식;이대영
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.5
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    • pp.775-783
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    • 1990
  • In this paper we implemented the fast thinning unit by modifying the pipeline architecture which was proposed by Stanley R. Sternberg. The unit is useful in preprocessing such as image representation and pattern recognition etc. This unit is composed of interface part, local memory part, address generation part, thinning processing part and control part. In thinning processing part, we shortened the thinning part which performed by means of look up table using window mapping table. Thus we improved the weakness of SAP, in which the number of delay pipeline and window pipeline are equal to image column size. Two independent memorys using tri-state buffer enable the two direction flow of address generated by address generation part. This unit avoids the complexity of architecture and has flexibility of image size by means of simple modification of logic bits.

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A study on real-time communication of remote station in the distributed control system (분산 제어 시스템에서 원격 제어국의 실시간 통신에 관한 연구)

  • 김내진;김진태;박인갑
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.10
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    • pp.21-30
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    • 1994
  • We discussed the Distributed Control System's design on preface and analyzed time of the real-time communication by using designed system. The DCS proposed in this thesis was implemented to network file system having recovery advantage and shared memory method to access file system of a Remote Station with ease. Also, this system minimized the network delay-time by using the real-time VME147 board. In implemented DCS, the performance analysis of real-time process of a Remote Station was done to get the total time for reak-tune communication from a Remote Station to the Central Station after terminating of process. For the analysis of system performance, we experiented by three steps. Firstly, we measuredthe processing the of LOOP function that real-time CPU convertes to-2,500~10.000 values from the input data of the Analog Interface Card. Secondly, we measured the processing time of the LOGIC function and the LOOP function. Lastly, we measured total processing time for communication from a Remote Station to the Centrol Station.

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