• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.469-472
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• 1999

CeO$_2$ thin films have used in wide applications such as SOI, buffer layer, antirflection coating, and gate dielectric layer. CeO$_2$takes one of the cubic system of fluorite structure and shows similar lattice constant (a=0.541nm) to silicon (a=0.543nm). We investigated CeO$_2$films as buffer layer material for nonvolatile memory device application of a single transistor. Aiming at the single transistor FRAM device with a gate region configuration of PZT/CeO$_2$ /P-Si , this paper focused on CeO$_2$-Si interface properties. CeO$_2$ films were grown on P-type Si(100) substrates by 13.56MHz RF magnetron sputtering system using a 2 inch Ce metal target. To characterize the CeO$_2$ films, we employed an XRD, AFM, C-V, and I-V for structural, surface morphological, and electrical property investigations, respectively. This paper demonstrates the best lattice mismatch as low as 0.2 % and average surface roughness down to 6.8 $\AA$. MIS structure of CeO$_2$ shows that breakdown electric field of 1.2 MV/cm, dielectric constant around 13.6 at growth temperature of 200 $^{\circ}C$, and interface state densities as low as 1.84$\times$10$^{11}$ cm $^{-1}$ eV$^{-1}$ . We probes the material properties of CeO$_2$ films for a buffer layer of FRAM applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.9
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• pp.880-886
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• 2014

Many railway signalling functions have increasingly depended on computer software with recent development in computing technology, leading to evolution into more flexible and intelligent railway signalling system. Meanwhile, software programs are likely to have many errors and the cost incurred by such errors has increased. Especially, if fatal software error occurs during railway operation, it may result in loss of lives. So the software verification and validation have become more important. It is needed for software functional safety tool to support these, but most commercial tools depend on direct access to the system's memory, resulting in many difficulties in application. Owing to such difficulties and complexity, they are rarely used in railway signalling system software validation. In this study, a new testing tool for software functional testing through an external interface that can be easily used in functional testing of software was developed. Such testing tool allows development and analysis of test cases for black-box testing through analysis of actually used interface protocols, leading to increased user convenience.

• Journal of Biomedical Engineering Research
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• v.15 no.3
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• pp.333-340
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• 1994

Laboratory information system (LIS) is a key tool to manage laboratory data in clinical pathology. Our department has developed an information system for routine hematology using down-sized computer system. We have used an IBM 486 compatible PC with 16 MB main memory, 210 MB hard disk drive, 9 RS-232C port and 24 pin dot printer The operating system and database management system were SCO UNIX and SCO foxbase, respectively. For program development, we used Xbase language provided by SCO foxbase. The C language was used for interface purpose. To make the system use friendly, pull-down menu was used. The system connected to our hospital information system via application program interface (API), so the information related to patient and request details is automatically transmitted to our computer. Our system interfaced with two complete blood count analyzers (Sysmex WE-8000 and Coulter STKS) for unidirectional data transmission from analyzer to computer. The authors suggests that this system based on down-sized computer could provide a progressive approach to total LIS based on local area network, and the implemented system could serve as a model for other hospital's LIS for routine hematology.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2003.11a
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• pp.69-72
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• 2003

This paper presents a signal processing IC for digital HDTV, which is designed to operate in bunt-in HDW or in HD-set-top Box. The chip supports de-multiplexing an ISO/IEC 13818-1 MPEG-2 TS stream. It decodes MPEG-2 MP@HL video bitstream, and provides high-quality scaled video for display on HDTV monitor. The chip consists of ARM7TDMI for TS-Demux, PCI interface, Audio interface, MPEG2 MP@HL video decoder Display processor, Graphic processor, Memory controller, Audio int3face, Smart Card interface and UART. It is fabricated using Sam sung's 0.18-um and the package of 492-pin BGA is used.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.5_6
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• pp.371-378
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• 2004

This paper presents the implementation and performance of the HVIA-GE card, which is a hardware implementation of the Virtual Interface Architecture (VIA) based on Gigabit Ethernet. The HVIA-GE card is a 32-bit/33MHz PCI adapter containing an FPGA for the VIA protocol engine and a Gigabit Ethernet chip set to construct a high performance physical network. HVIA-GE performs virtual-to-physical address translation, Doorbell, and send/receive completion operations in hardware without kernel intervention. In particular, the Address Translation Table (ATT) is stored on the local memory of the HVIA-GE card, and the VIA protocol engine efficiently controls the address translation process by directly accessing the ATT. As a result, the communication overhead during send/receive transactions is greatly reduced. Our experimental results show the maximum bandwidth of 93.7MB/s and the minimum latency of 11.9${\mu}\textrm{s}$. In terms of minimum latency HVIA-GE performs 4.8 times and 9.9 times faster than M-VIA and TCP/IP, respectively, over Gigabit Ethernet. In addition, the maximum bandwidth of HVIA-GE is 50.4% and 65% higher than M-VIA and TCP/IP respectively.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1783-1785
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• 1999

In this paper, we apply V-Q Lissajoucs' figure for observation of a V-Q (Voltage-Charge) hysteresis loop at interface between phosphor and insulation layer in P-ELDz which are a simple structure and the back lighting of LCDs (Liquid Crystal Display). In V-Q Lissajous' figure, we measured a change of hysteresis loop according to the thickness of Insulation and phosphor layer. From experiment result, we will be obtained a optimum thickness of insulation with comparing the correlation of a V-L (Voltage-Luminance) and V-Q hysteresis loop.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2007.11a
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• pp.253-256
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• 2007

The web server for the embedded Linux system(ELS), unlike the ones for the usual Linux or Windows, has some disadvantages such as small number of installable applications, low compatibility and limited extensibility. This fact raises some problems when data are transferred in real-time via the web server, which are mainly caused by a poor performance of the processor and small-sized memory. Conventional user interfaces adopted for the usual web servers are unsuitable for the ELS because they are platform-limited and their installations are done by the form of plug-ins. If the web server for the ELS has an Ajax engine that can be utilized without any installation procedure, the advantages of usability, accessibility and quick response time can be obtained. This paper presents the Ajax interface for the ELS web server. The efficiency of the proposed technology in the real-time remote monitoring is shown through an implementation.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2677-2680
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• 2003

This paper describes the implementation of a 4 channel embedded DVR system. It receives analog video from CCD cameras and converts to 640${\times}$480 CCIR-656 digital video by 30 frames/sec. These digital images are compressed to the wevelet transformed image using hardware codec which is capable of 350:1 real-time compression and decompression. The DVR is working on linux and it implemented on an embedded system which is based on StrongARM processor. For the interface between processor system module and image processing module, GPIO and memory control module are used, device drivers are developed. Linux kernel source is customized. This paper provides techniques of embedded system development and embedded linux porting.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.99-100
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• 2009

SGOI 1T-DRAM cells with various Ge mole fractions were fabricated and compared to the SOI 1T-DRAM cell. SGOI 1T-DRAM cells have a higher leakage current than SOI 1T-DRAM cell at subthreshold region. The leakage current due to crystalline defects and interface states at Si/SiGe increased with Ge mole. This phenomenon causes sensing margin and the retention time of SGOI 1T-DRAMs decreased with increase of Ge mole fraction.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.821-824
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• 2001

본 논문에서는 TMS320C6701 을 이용하여 방대한 양의 데이터를 실시간으로 처리할 수 있는 병렬 DSP 시스템을 설계 및 구현한 것에 대하여 나타내었다. 이 병렬 DSP 시스템은 DSP 칩간의 통신과 보드간의 통신이 가능하며, DSP칩이 마스터가 되어 EMIF(External Memory Interface)포트를 통해 다른 DSP 칩의 지역메모리를 엑세스 할 수 있으며, 또한 외부의 호스트 프로세서가 보드 내의 DSP 칩에 프로그램을 다운로딩 할 수 있도록 설계하였다. DSP 칩에 의해 처리된 신호는 PCI 버스를 통하여 호스트로 전송되며, DSP 칩에서 DSP 칩 또는 지역메모리와의 통신은 지역버스를 통해 직접적으로 이루어진다. 병렬 DSP 시스템을 통하여 고속의 병렬신호처리를 수행 할 수 있다.