• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.673-676
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• 2003

In this paper, we designed the embedded system used for wireless LAN communication. Embedded system kernel is made from general linux kernel 2.4.18 by applying the ARM patch (2.4.18-rmk7) and the SA1100 patch(2.4.18-rmk7), then porting board level suitable to target system. The SA-1110 PCMCIA interface provides controls for one PCMCIA card slot with a PSKTSEL pin for support of a second slot. The embedded system requires external logic to complete the PCMCIA socket interface. For dual-voltage support, level shifting buffers are required for all SA-1110 input signals. Hot insertion capability requires that each socket be electrically isolated from each other, and from the remainder of the memory system. embedded system is for socket services approaching PCMCIA socket, detecting number of sockets, sensing insertion and removal, and applying power. It also provides interface with Card services. Embedded system supports Host driver for lucent chips that is installed orinoco driver cross compiled. The meaning can say that is doing wireless LAN communication through wireless LAN in imbedded system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.7
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• pp.1275-1282
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• 2007

With the rapid spread of smart mobile products and practical use of wireless network, it became possible to offer the computing environment people can use anytime anywhere and it is predicted that portable computer as the next generation computing is to be put to practical use. This computer will be expected to have the new interface which provides realistic service through human's five senses as well as the interface through the visual and auditory senses. Accordingly, in this study, we are going to talk about the technology that expresses and reproduces what is based on olfactory information - closely related with memory among honan's five senses - in order to embody the lifelike user interface.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.11 no.5
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• pp.224-230
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• 2001

The characteristics of $NO/N_2O$ annealed reoxidized nitrided oxide being studied as super thin gate oxide and gate dielectric layers of Non-Volatile Semiconductor Memory (NVSM) were investigated by Dynamic Secondary Ion Mass Spectrometry (D-SIMS), Time-of-Flight Secondary Ion Mass Spectrometry (ToF-SIMS), and Auger Electron Spectroscopy (AES). The specimen was annealed by $NO/N_2O$ after initial oxide process and then rcoxidized for nitrogen redistribution in nitrided oxide. Out-diffusion of incorporated nitrogen during the wet oxidation in reoxidation process took place more strongly than that of the dry oxidation. It seems to indicate that hydrogen plays a role in breaking the Si N bonds. As reoxidation proceeds, incorporated nitrogen of $NO/N_2O$ annealed nitrided oxide is obsen-ed to diffuse toward the surface and substrate at the same time. ToF-SIMS results show that SiON species are detected at the initialoxide interface, and Si,NO species near the new $Si_2NO$ interface that formed after reoxidation. These SiON and $Si_2NO$ species most likely to relate to the origin of the state of memory charge traps in reoxidized nitrided oxide, because nitrogen dangling bonds of SiON and silicon dangling bonds of $Si_2NO$ are contained defects associated with memory effect.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.431-441
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• 2003

This paper presents the design of 32 bit microprocessor for a sequence control using a field programmable gate array(FPGA). The microprocessor was designed by a VHDL with top down method, the program memory was separated from the data memory for high speed execution of sequence instructions. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 32 bits. And the real time debug operation was implemented for easeful debugging the designed processor with a single step run, PC break point run, data memory break point run. Also in this designed microprocessor, pulse instructions, step controllers, master controllers, BM and BCD type arithmetic instructions, barrel shift instructions were implemented for sequence logic control. The FPGA was synthesized under a Xilinx's Foundation 4.2i Project Manager using a V600EHQ240 which contains 600,000 gates. Finally simulation and experiment were successfully performed respectively. For showing good performance, the designed microprocessor for the sequence logic control was compared with the H8S/2148 microprocessor which contained many bit instructions for sequence logic control. The designed processor for the sequence logic showed good performance.

• Journal of Adhesion and Interface
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• v.9 no.3
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• pp.20-26
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• 2008

It is well know that the structure of shape memory alloy (SMA) can change from martensite austenite by either temperature or stress. Due to their inherent shape recovery properties, SMA fiber can be used such as for stress or cure-monitoring sensor or actuator, during applied stress or temperature. Incomplete superelasticity was observed as the stress hysteresis at stress-strain curve under cyclic loading test and temperature change. Superelasticity behavior was observed for the single-SMA fiber/epoxy composites under cyclic mechanical loading at stress-strain curve. SMA fiber or epoxy embedded SMA fiber composite exhibited the decreased interfacial properties due to the cyclic loading and thus reduced shape memory performance. Rigid epoxy and the changed interfacial adhesion between SMA fiber and epoxy by the surface treatment on SMA fiber exhibited similar incomplete superelastic trend. Epoxy embedded single SMA fiber exhibited the incomplete recovery during cure process by remaining residual heat and thus occurring residual stress in single SMA fiber/epoxy composite.

• Korean Journal of Materials Research
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• v.11 no.2
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• pp.88-93
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• 2001

The thermal behavior and the crystallographic characteristics of an epitaxial $C49-TiSi_2$ island formed in a Si (001) substrate by $N_2$, treatment were investigated by X-ray diffraction (XRD) and high-resolution transmission electron microscopy (HRTEM). It was found from the analyzed results that the epitaxial $C49-TiSi_2$ was thermally stable even at high temperature of $1000^{\circ}C$ therefore did not transform into the C54-stable phase and did not deform morphologically. HRTEM results clearly showed that the epitaxial $TiSi_2$ phase and Si have the orientation relationship of (060)[001]$TiSi_2$//(002)[110]Si, and the lattice strain energy at the interface was mostly relaxed by the formation of misfit dislocations. Furthermore, the mechanism on the formation of the epitaxial $_C49-TiSi2$ in Si and stacking faults lying on the (020) plane of the C49 Phase were discussed through the analysis of the HRTEM image and the atomic modeling.

• Journal of Korea Game Society
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• v.9 no.2
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• pp.13-22
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• 2009

Recently, mobile games are developed as the various genre and form with the hardware performance improvement and communication network speed increase of the mobile phone. But it shows the limit of the game material to be developed, because the mobile game has to play by using only the keypad handing of the mobile phone. In this research, 'Flip On / Off interface' and 'Microphone interface' were developed in order to utilize the physical device of the mobile phone as the game interface. 'Flip On / Off interface' and 'Microphone interface' have the advantage that there is no need to purchase a device as an additional interface with utilizing the hardware of the mobile phone itself and the progressing of a game is smooth in comparison with the keypad method of the pre-existence mobile game because the interface waiting time for a call response is short. Moreover, by applying to a commercializing game, the developed interface tests, we confirmed an availability at the commercialization inspection standards on mobile phone without the heap memory deficiency phenomenon to be smooth of an operation. Furthermore, in the result of usability evaluation accessability, reliability, and aesthetics were rated as 'high'. The results of this research reveal that the interface environment of the mobile game limited to a keypad will be able to be made with diversification.

• Journal of the Korea Computer Graphics Society
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• v.19 no.1
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• pp.11-20
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• 2013

This paper introduces a user interface for large 3D meshes in mobile systems, which have limited memory, screen size and battery power. A large 3D mesh is divided into partitions and simplified in multi-resolutions so a large file is transformed into a number of small data files and saved in a PC server. Only selected small files specified by the user are hierarchically transmitted to the mobile system for 3D browsing and rendering. A 3D preview in a pop-up shows a simplified mesh in the lowest resolution. The next step displays simplified meshes whose resolutions are automatically controlled by the user interactions. The last step is to render a set of detailed original partitions in a selected range. As a result, while minimizing using mobile system resources, our interface enables us to browse and display 3D meshes in mobile systems through real-time interactions. A mobile 3D viewer and a 3D app are also presented to show the utility of the proposed user interface.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.245-252
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• 2003

We designed a silicon pressure sensor interface circuit with digital calibration capability. The interface circuit is composed of an analog section and a digital section. The analog section amplifies the weak signal from the sensor and the digital section handles the calibration function and communication function between the chip and outside microcontroller that controls the calibration. The digital section is composed of I2C serial interface, memory, trimming register and controller. The I2C serial interface is optimized to suit the need of on-chip silicon microsensor in terms of number of IO pins and silicon area. The major part of the design is to build a controller circuit that implements the optimized I2C protocol. The designed chip was fabricated through IDEC's MPW. We also made a test board and the test result showed that the chip performs the digital calibration function very well as expected.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.4
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• pp.192-200
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• 2002

The performance of a PC cluster system is limited by the use of traditional communication protocols, such as TCP/IP because these protocols are accompanied with significant software overheads. To overcome the problem, systems based on user-level interface for message passing without intervention of kernel have been developed. The VIA(Virtual Interface Architecture) is one of the representative user-level interfaces which provide low latency and high bandwidth. In this paper, a VIA system is implemented on an SCI(Scalable Coherent Interface) network based PC cluster. The system provides both message-passing and shared-memory programming environments and shows the maximum bandwidth of 84MB/s and the latency of $8{\mu}s$. The system also shows better performance in comparison with other comparable computer systems in carrying out parallel benchmark programs.