• Title/Summary/Keyword: memory controller

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Variable structure control of robot manipulator using neural network (신경 회로망을 이용한 가변 구조 로보트 제어)

  • 이종수;최경삼;김성민
    • 제어로봇시스템학회:학술대회논문집
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    • 1990.10a
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    • pp.7-12
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    • 1990
  • In this paper, we propose a new manipulator control scheme based on the CMAG neural network. The proposed control consists of two components. The feedforward component is an output of trained CMAC neural network and the feedback component is a modified sliding mode control. The CMAC accepts the position, velocity and acceleration of manipulator as input and outputs two values for the controller : One is the nominal torque used for feedforward compensation(M1 network) and the other is the inertia matrix related information used for the feedback component(M2 network). Since the used control algorithm guarantees the robust trajectory tracking in spite of modeling errors, the CMAC mapping errors due to the memory limitation are little worth consideration.

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The Design and Implementation of a TV Tuner for the Digital Terrestrial Broadcasting

  • Chong, Young-Jun;Kim, Jae-Young;Lee, Il-Kyoo;Choi, Jae-Ick;Oh, Seung-Hyeub
    • Journal of electromagnetic engineering and science
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    • v.1 no.2
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    • pp.131-138
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    • 2001
  • The DTV (Digital TV) tuner for an 8-VSB (Vestigial Side-Band) modulation was developed to meet the requirements of the ATSC (Advanced Television Systems Committee). The double frequency conversion and the active tracking filter in the front-end were used to cancel interferences between adjacent channels and multi-channels by suppressing the IF beat and the Image frequency. However, It was impossible to get frequency mapping between the tracking filter and the first VCO (Voltage Controlled Oscillator) in the existing DTV tuner structure which differs from the NTSC (National Television Systems Committee) tuner. This paper, therefore, suggests an assailable structure and a new method for the automatic frequency selection by mapping the frequency characteristics over the tracking voltage and the combined HW which is composed of a Micro-controller, an EEPROM (Electrically Erasable Programmable Read Only Memory), a DAC (Digital-to-Analog Converter), an OP amplifier, and a switch driver.

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PThe Robust Control System Design using Intelligent Hybrid Self-Tuning Method (지능형 하이브리드 자기 동조 기법을 이용한 강건 제어기 설계)

  • 권혁창;하상형;서재용;조현찬;전홍태
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2003.05a
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    • pp.325-329
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    • 2003
  • This paper discuss the method of the system's efficient control using a Intelligent hybrid algorithm in nonlinear dynamics systems. Existing neural network and genetic algorithm for the control of non-linear systems work well in static states. but it be not particularly good in changeable states and must re-learn for the control of the system in the changed state. This time spend a lot of time. For the solution of this problem we suggest the intelligent hybrid self-tuning controller. it includes neural network, genetic algorithm and immune system. it is based on neural network, and immune system and genetic algorithm are added against a changed factor. We will call a change factor an antigen. When an antigen broke out, immune system come into action and genetic algorithm search an antibody. So the system is controled more stably and rapidly. Moreover, The Genetic algorithm use the memory address of the immune bank as a genetic factor. So it brings an advantage which the realization of a hardware easy.

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Solar Cells Characteristics Tester

  • Jirawath, Parnklang;Amnard, Jenjirodpipat;Santi, Hanklar
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.511-511
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    • 2000
  • The equipment is used for testing the electrical characteristics of solar cells that were connected to be a solar panel, which can be found anywhere of solar power plant. This device was built from power switch devices f3r sinking the high current of the solar panel. The processor is a controller, which controls the quantity of the current, which flow through the switching devices and collect the characteristic of the solar panel. The tester can measure the current, voltage, temperature, and light intensity, which are main factors that affect the electrical characteristics of solar cells. 12 bits resolution signal converter is used to change the measuring levels so we can change measuring levels to 4096 levels, and these data are stored in tile memory. The equipment can also calculate the maximum power of the solar system panel.

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Power Monitoring System Using Microprocessor (원칩마이컴을 이용한 전력감시장치)

  • Sin, S.Y.;Seo, K.S.;Cho, G.B.;Baek, H.L.;Lee, S.K.;Kim, D.K.
    • Proceedings of the KIEE Conference
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    • 2001.04a
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    • pp.338-341
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    • 2001
  • This paper describes on the development of power monitoring system using microprocessor. The detecting power system is composed of main controller system and analyzing software. The system detected voltage, current temperature, leakage current and its saved in ROM. This system applies the 'AT89C52' to CPU and 'AM29F040B' used a memory to save the data.

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ON LEARNING OF CMAC FOR MANIPULATOR CONTROL

  • Choe, Dong-Yeop;Hwang, Hyeon
    • 한국기계연구소 소보
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    • s.19
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    • pp.93-115
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    • 1989
  • Cerebellar Model Arithmetic Controller(CMAC) has been introduced as an adaptive control function generator. CMAC computes control functions referring to a distributed memory table storing functional values rather than by solving equations analytically or numerically. CMAC has a unique mapping structure as a coarse coding and supervisory delta-rule learning property. In this paper, learning aspects and a convergence of the CMAC were investigated. The efficient training algorithms were developed to overcome the limitations caused by the conventional maximum error correction training and to eliminate the accumulated learning error caused by a sequential node training. A nonlinear function generator and a motion generator for a two d. o. f. manipulator were simulated. The efficiency of the various learning algorithms was demonstrated through the cpu time used and the convergence of the rms and maximum errors accumulated during a learning process; A generalization property and a learning effect due to the various gains were simulated. A uniform quantizing method was applied to cope with various ranges of input variables efficiently.

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High Performance IP Fowarding Engine for ATM based Gigabit Routers

  • Park, Byeong-Cheol;Park, Chang-Sik;Jeong, Youn-Kwae;Lee, Jeong-Tae
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.533-536
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    • 2000
  • In this paper, we proposed high performance packet forwarding engine for asynchronous transfer mode(ATM) based gigabit routers. The forwarding engine is based on ATM switch and accommodates four 622Mbps ports. The forwarding engine has been designed to be able to process the Intemet protocol(IP) packet at 2.5Gbps using the pipelined If header processing and lookup control mechanism. For high performance packet forwarding, we used content addressable memory(CAM) based routing coprocessor operating in hardware and implemented the pipelined lookup control function into a field programmable gate array(FPGA). The pipelined packet header processing mechanism enhanced the forwarding performance of the If packets ingressed from four different 622Mbps ports. Moreover, the If lookup controller designed to have the performance up to 12.5Mpps. The proposed forwarding engine is also designed to support differentiated services(DS) and multiprotocol label switching(MPLS).

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Development of Halfedge-based Triangular Mesh Data Structure (반모서리 기반의 삼각망 자료 구조 개발)

  • Chung, Yun-Chan;Chang, Min-Ho
    • Korean Journal of Computational Design and Engineering
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    • v.14 no.1
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    • pp.33-41
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    • 2009
  • Triangular mesh models are widely used in reverse engineering, computer graphics, rapid prototyping and NC(numerical controller) tool-path generation. Triangular mesh models are generated from point clouds, surface models and solid models. A halfedge-based triangular mesh data structure is proposed and the development considerations are presented. In the presented data structure, halfedge is the key data structure. Halfedge stores its triangle index and the order in the triangle. Triangles do not store the halfedge lists explicitly. Halfedge is referred by value and defined when it is required. Proposed data structure supports four design requirements: efficient rendering, compact memory, supporting efficient algorithms and easy programming.

The improved contrast control method for LCD monitor

  • Kwon, Byong-Heon;Park, Myung-Ryul;Youn, Jin-Suk
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1811-1814
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    • 2002
  • In this paper, we propose an improved contrast control method f9r image improvement of multi-gray scale image. The proposed contrast control method can improve contrast of image by changing gradient of weight as the type of input image. In addition, the proposed method does not require field and frame memory for large amount of computed data. And, the proposed method can be easily applied to the FPD fur real-time processing because of its less hardware complexity than that of the conventional methods. Also it can flexibly control the contrast of input gray level by varying the weight values that control the contrast range. The operation and performance of the proposed controller have been verified using computer simulation.

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Design of a Voting Mechanism considering Safety for NMR PPC Using EPLD and Reliability Analysis (EPLD를 이용한 안전성이 고려된 NMR PPC의 보팅메카니즘 설계와 신뢰도 분석)

  • Ryoo, Dong-Wan;Park, Heui-Youn;Koo, In-Soo;Seo, Bo-Hyeok
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.2557-2560
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    • 2000
  • The protection system of the nuclear reactor and chemical reactor are representative of PPC(Plant Protection Controller). This PPC must be designed based on reliability as well as concept of safety, which is a failed system go a way of safe. PPC is consist of part of data acquisition, calculator, communication with redundancy, and a voter is important factor of reliability. Because it is serial connected. This paper presents a Design and Analysis of a Voting Mechanism considering Safety for NMR PPC Using EPLD. In the case of digital implementation a coincidence logic(voter) of PPC, it needs CPU and memory, so increase a number of units. Therefore the failure rate and cost is increased. On the contrary when it is designed EPLD or FPGA.

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