• Title/Summary/Keyword: memory compression

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Block-based Learned Image Compression for Phase Holograms (신경망 기반 블록 단위 위상 홀로그램 이미지 압축)

  • Seung Mi Choi;Su yong Bahk;Hyun Min Ban;Jun Yeong Cha;Hui Yong Kim
    • Journal of Broadcast Engineering
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    • v.28 no.1
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    • pp.42-54
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    • 2023
  • It is an important issue to compress huge holographic data in a digital format. In particular, research on the compression of phase-only holograms for commercialization is noteworthy. Conventional video coding standards optimized for natural images are not suitable for compressing phase signals, and neural network-based compression model that can be optimized for phase signals can achieve high performance, but has a memory issue in learning high-resolution holographic data. In this paper, we show that by applying a block-based learned image compression model that can solve memory problems to phase-only holograms, the proposed method can demonstrate significant performance improvement over standard codecs even under the same conditions as block-based. Block-based learned compression model can provide compatibility with conventional standard codecs, solve memory problems, and can perform significantly better against phase-only hologram compression.

A Cache-Conscious Compression Index Based on the Level of Compression Locality (압축 지역성 수준에 기반한 캐쉬 인식 압축 색인)

  • Kim, Won-Sik;Yoo, Jae-Jun;Lee, Jin-Soo;Han, Wook-Shin
    • Journal of Korea Multimedia Society
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    • v.13 no.7
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    • pp.1023-1043
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    • 2010
  • As main memory get cheaper, it becomes increasingly affordable to load entire index of DBMS and to access the index. Since speed gap between CPU and main memory is growing bigger, many researches to reduce a cost of main memory access are under the progress. As one of those, cache conscious trees can reduce the cost of main memory access. Since cache conscious trees reduce the number of cache miss by compressing data in node, cache conscious trees can reduce the cost of main memory. Existing cache conscious trees use only fixed one compression technique without consideration of properties of data in node. First, this paper proposes the DC-tree that uses various compression techniques and change data layout in a node according to properties of data in order to reduce cache miss. Second, this paper proposes the level of compression locality that describes properties of data in node by formula. Third, this paper proposes Forced Partial Decomposition (FPD) that reduces the nutter of cache miss. DC-trees outperform 1.7X than B+-tree, 1.5X than simple prefix B+-tree, and 1.3X than pkB-tree, in terms of the number of cache misses. Since proposed DC-trees can be adopted in commercial main memory database system, we believe that DC-trees are practical result.

An Efficient MBR Compression Technique for Main Memory Multi-dimensional Indexes (메인 메모리 다차원 인덱스를 위한 효율적인 MBR 압축 기법)

  • Kim, Joung-Joon;Kang, Hong-Koo;Kim, Dong-Oh;Han, Ki-Joon
    • Journal of Korea Spatial Information System Society
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    • v.9 no.2
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    • pp.13-23
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    • 2007
  • Recently there is growing Interest in LBS(Location Based Service) requiring real-time services and the spatial main memory DBMS for efficient Telematics services. In order to optimize existing disk-based multi-dimensional Indexes of the spatial main memory DBMS in the main memory, multi-dimensional index structures have been proposed, which minimize failures in cache access by reducing the entry size. However, because the reduction of entry size requires compression based on the MBR of the parent node or the removal of redundant MBR, the cost of MBR reconstruction increases in index update and the efficiency of search is lowered in index search. Thus, to reduce the cost of MBR reconstruction, this paper proposed the RSMBR(Relative-Sized MBR) compression technique, which applies the base point of compression differently in case of broad distribution and narrow distribution. In case of broad distribution, compression is made based on the left-bottom point of the extended MBR of the parent node, and in case of narrow distribution, the whole MBR is divided into cells of the same size and compression is made based on the left-bottom point of each cell. In addition, MBR was compressed using a relative coordinate and size to reduce the cost of search in index search. Lastly, we evaluated the performance of the proposed RSMBR compression technique using real data, and proved its superiority.

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Selecting Guides on Compression Parameters in KOMPSAT-2 MSC

  • Lee, Jong-Tae;Lee, Sang-Gyu;Lee, Sang-Taek
    • Proceedings of the KSRS Conference
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    • 2003.11a
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    • pp.1102-1104
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    • 2003
  • KOMPSAT-2 provides two different imaging methods, direct imaging and playback imaging. For playback imaging operation KOMPSAT-2 has a storage device called DCSU (Data Compression & Storage Unit) to hold images taken before. Compression function is necessary to save memory space and data transmission time to ground station. There are several parameters for compression like compression ratio. Due to DCSU architectural characteristics and KOMPSAT-2 operational limitations, there are some restrictions on selecting compression parameters. This paper will provide selecting guides on compression parameters.

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A JPEG Input Buffer Architecture for Real-Time Applications (실시간 JPEG 입력 버퍼 아키텍처)

  • Im, Min-Jung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.2
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    • pp.7-13
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    • 2002
  • When a USB digital camera is used for PC video-conference applications, motion picture data need to be transferred to the PC through the USB port. Due to the mismatch between the data rates of the USB and the motion picture, data compression should be performed before the transmission from the USB. While many motion picture compression algorithms require large intermediate memory space, the JPEG algorithm does not need to store an entire frame for the compression. Instead, a relatively small buffer is required at the input of the JPEG compression engine to resolve the inconsistency between the orders of the inputted data and the consumed data. Data reordering can be easily implemented using a double buffering scheme, which still requires a considerable size of memory. In this paper, a novel memory management scheme is proposed to avoid the double buffering. The proposed memory architecture requires a small amount of memory and a simple address generation scheme, resulting in overall cost reduction.

A Consistent Quality Bit Rate Control for the Line-Based Compression

  • Ham, Jung-Sik;Kim, Ho-Young;Lee, Seong-Won
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.5
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    • pp.310-318
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    • 2016
  • Emerging technologies such as the Internet of Things (IoT) and the Advanced Driver Assistant System (ADAS) often have image transmission functions with tough constraints, like low power and/or low delay, which require that they adopt line-based, low memory compression methods instead of existing frame-based image compression standards. Bit rate control in the conventional frame-based compression systems requires a lot of hardware resources when the scope of handled data falls at the frame level. On the other hand, attempts to reduce the heavy hardware resource requirement by focusing on line-level processing yield uneven image quality through the frame. In this paper, we propose a bit rate control that maintains consistency in image quality through the frame and improves the legibility of text regions. To find the line characteristics, the proposed bit rate control tests each line for ease of compression and the existence of text. Experiments on the proposed bit rate control show peak signal-to-noise ratios (PSNRs) similar to those of conventional bit rate controls, but with the use of significantly fewer hardware resources.

Embedded Compression Codec Algorithm for Motion Compensated Wavelet Video Coding System (움직임 보상된 웨이블릿 기반의 비디오 코딩 시스템에 적용 가능한 임베디드 압축 코덱 알고리즘)

  • Kim, Song-Ju
    • The Journal of the Korea Contents Association
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    • v.12 no.3
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    • pp.77-83
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    • 2012
  • In this paper, a low-complexity embedded compression (EC) Codec algorithm for the wavelet video coder is applied to reduce excessive external memory requirements. The EC algorithm is used to achieve a fixed compression ratio of 50 % under the near-lossless-compression constraint. The EC technique can reduce the 50 % memory requirement for intermediate low-frequency coefficients during multiple discrete wavelet transform stages compared with direct implementation of the wavelet video encoder of this paper. Furthermore, the EC scheme based on a forward adaptive quantization and fixed length coding can save bandwidth and size of buffer between DWT and SPIHT to 50 %. Simulation results show that our EC algorithm present only PSNR degradation of 0.179 and 0.162 dB in average when the target bit-rate of the video coder are 1 and 0.5 bpp, respectively.

An Efficient Spatial Index Technique based on Flash-Memory (플래시 메모리 기반의 효율적인 공간 인덱스 기법)

  • Kim, Joung-Joon;Sim, Hee-Joung;Kang, Hong-Koo;Lee, Ki-Young;Han, Ki-Joon
    • Journal of Korea Spatial Information System Society
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    • v.11 no.2
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    • pp.133-142
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    • 2009
  • Recently, with the advance of wireless internet and the frequent use of mobile devices, demand for LBS(Location Based Service) is increasing, and research is required on spatial indexes for the storage and maintenance of spatial data to provide efficient LBS in mobile device environments. In addition, the use of flash memory as an auxiliary storage device is increasing in order to store large spatial data in a mobile terminal with small storage space. However, the application of existing spatial indexes to flash-memory lowers index performance due to the frequent updates of nodes. To solve this problem, research is being conducted on flash-memory based spatial indexes, but the efficiency of such spatial indexes is lowered by low utilization of buffer and flash-memory space. Accordingly, in order to solve problems in existing flash-memory based spatial indexes, this paper proposed FR-Tree (Flash-Memory based R-Tree) that uses the node compression technique and the delayed write operation technique. The node compression technique of FR-Tree increased the utilization of flash-memory space by compressing MBR(Minimum Bounding Rectangle) of spatial data using relative coordinates and MBR size. And, the delayed write operation technique reduced the number of write operations in flash memory by storing spatial data in the buffer temporarily and reflecting them in flash memory at once instead of reflecting the insert, update and delete of spatial data in flash-memory for each operation. Especially, the utilization of buffer space was enhanced by preventing the redundant storage of the same spatial data in the buffer. Finally, we perform ed various performance evaluations and proved the superiority of FR-Tree to the existing spatial indexes.

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An On-chip Cache and Main Memory Compression System Optimized by Considering the Compression rate Distribution of Compressed Blocks (압축블록의 압축률 분포를 고려해 설계한 내장캐시 및 주 메모리 압축시스템)

  • Yim, Keun-Soo;Lee, Jang-Soo;Hong, In-Pyo;Kim, Ji-Hong;Kim, Shin-Dug;Lee, Yong-Surk;Koh, Kern
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.1_2
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    • pp.125-134
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    • 2004
  • Recently, an on-chip compressed cache system was presented to alleviate the processor-memory Performance gap by reducing on-chip cache miss rate and expanding memory bandwidth. This research Presents an extended on-chip compressed cache system which also significantly expands main memory capacity. Several techniques are attempted to expand main memory capacity, on-chip cache capacity, and memory bandwidth as well as reduce decompression time and metadata size. To evaluate the performance of our proposed system over existing systems, we use execution-driven simulation method by modifying a superscalar microprocessor simulator. Our experimental methodology has higher accuracy than previous trace-driven simulation method. The simulation results show that our proposed system reduces execution time by 4-23% compared with conventional memory system without considering the benefits obtained from main memory expansion. The expansion rates of data and code areas of main memory are 57-120% and 27-36%, respectively.

CC-GiST: A Generalized Framework for Efficiently Implementing Arbitrary Cache-Conscious Search Trees (CC-GiST: 임의의 캐시 인식 검색 트리를 효율적으로 구현하기 위한 일반화된 프레임워크)

  • Loh, Woong-Kee;Kim, Won-Sik;Han, Wook-Shin
    • The KIPS Transactions:PartD
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    • v.14D no.1 s.111
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    • pp.21-34
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    • 2007
  • According to recent rapid price drop and capacity growth of main memory, the number of applications on main memory databases is dramatically increasing. Cache miss, which means a phenomenon that the data required by CPU is not resident in cache and is accessed from main memory, is one of the major causes of performance degradation of main memory databases. Several cache-conscious trees have been proposed for reducing cache miss and making the most use of cache in main memory databases. Since each cache-conscious tree has its own unique features, more than one cache-conscious tree can be used in a single application depending on the application's requirement. Moreover, if there is no existing cache-conscious tree that satisfies the application's requirement, we should implement a new cache-conscious tree only for the application's sake. In this paper, we propose the cache-conscious generalized search tree (CC-GiST). The CC-GiST is an extension of the disk-based generalized search tree (GiST) [HNP95] to be tache-conscious, and provides the entire common features and algorithms in the existing cache-conscious trees including pointer compression and key compression techniques. For implementing a cache-conscious tree based on the CC-GiST proposed in this paper, one should implement only a few functions specific to the cache-conscious tree. We show how to implement the most representative cache-conscious trees such as the CSB+-tree, the pkB-tree, and the CR-tree based on the CC-GiST. The CC-GiST eliminates the troublesomeness caused by managing mire than one cache-conscious tree in an application, and provides a framework for efficiently implementing arbitrary cache-conscious trees with new features.