• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.6A
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• pp.618-627
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• 2002

In processing images using 2 dimensional Discrete Wavelet Transform(2D-DWT), the method to process the pixels around the image boundary may affect the quality of image and the cost to implement in hardware and software. This paper proposed an effective method to treat the boundary pixels, which is apt to implement in hardware and software without losing the quality of the image costly. This method processes the 2-D image as 1-D array so that 2-D DWT is performed by considering the image with the serial-sequential data structure (Serial-Sequential Processing). To show the performance and easiness in implementation of the proposed method, an image compression codec which compresses image and reconstructs it has been implemented and experimented. It included log-scale fried quantizer, but the entropy coder was not implemented. From the experimental results, the proposed method showed the SNR of almost the same SNR(Signal to Noise Ratio) to the Periodic Expansion(PE) method when the compression ratio(excluding entropy coding) of 2:1, 15.3% higher than Symmetric Expansion(SE) method, and 9.3% higher than 0-pixel Padding Expansion(ZPE) method. Also PE method needed 12.99% more memory space than the proposed method. By considering only the compression process, SE and ZPE methods needed additional operations than the proposed one. In hardware implementation, the proposed method in this paper had 5.92% of overall circuit as the control circuit, while SE, PE, and ZPE method has 22%, 21,2%, and 11.9% as the control circuit, respectively. Consequently, the proposed method can be thought more effective in implementing software and hardware without losing any image quality in the usual image processing applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.1
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• pp.64-70
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• 2008

The H.264 standard is widely used due to the high compression rate and quality. The deblocking filter of the H.264 standard improves the quality of images by eliminating blocking artifacts of pictures, and it requires a lot of computation. We propose a new hardware architecture for the deblocking filter with pipelined architecture, 1-D filters which support both horizontal and vertical filtering and efficient memory management. Four memory blocks are configured for the efficient storage and access of the current macroblock and adjacent referenced sub-macroblocks, and the pixel data from the motion compensation unit can be transferred without waiting during the computation cycles of the deblocking filter. The number of computation cycles and the hardware area are reduced using the proposed architecture, and the performance of the H.264 decoder is improved. We design the deblocking filter using Verilog-HDL and implement using an FPGA. The designed deblocking filter can be used for decoding HD quality images at 77 MHz.

• KIPS Transactions on Software and Data Engineering
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• v.5 no.3
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• pp.155-164
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• 2016

For frequency pattern analysis of large databases, the new tree-based frequency pattern analysis algorithm which can compensate for the disadvantages of the Apriori method has been variously studied. In frequency pattern tree, the number of nodes is associated with memory allocation, but also affects memory resource consumption and processing speed of the growth. Therefore, reducing the number of nodes in the tree is very important in the frequency pattern mining. However, the absolute criteria which need to order the transaction items for construction frequency pattern tree has lowered the compression ratio of the tree nodes. But most of the frequency based tree construction methods adapted the absolute criteria. FP-tree is typically frequency pattern tree structure which is an extended prefix-tree structure for storing compressed frequent crucial information about frequent patterns. For construction the tree, all the frequent items in different transactions are sorted according to the absolute criteria, frequency descending order. CanTree also need to absolute criteria, canonical order, to construct the tree. In this paper, we proposed a novel frequency pattern tree construction method that does not use the absolute criteria, IRFP-tree algorithm. IRFP-tree(Intersection Rule based FP-tree). IRFP-tree is constituted with the new paradigm of the intersection rule without the use of the absolute criteria. It increased the compression ratio of the tree nodes, and reduced the tree construction time. Our method has the additional advantage that it provides incremental mining. The reported test result demonstrate the applicability and effectiveness of the proposed approach.

• Journal of Internet Computing and Services
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• v.7 no.3
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• pp.107-118
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• 2006

Recently, network infra grows rapidly and the digital image compression technique have made remarkable progress, and therefore the demand of the real-time image surveillance system which uses a network camera server is increasing. Network Camera Server has emerged as an attractive alternative to the CCTV for the real-time image surveillance. From this reason, the demand regarding the development of the real-time image surveillance system which uses a network camera server is increasing as well. In this paper, we will provide a model for JPEG Streamer which is used in real-time image surveillance system. And we will design and implement this model. For the stability and efficiency of the JPEG Streamer, we'll use the thread pool and shared memory. We will also introduce the concept of double buffering for increasing the quality of real-time image, Using the JPEG Streamer, a raising of the productivity, reliability and stability will be able to secure to development of real-time image surveillance system.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.5
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• pp.332-346
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• 2003

In this paper, a system which can compress and reconstruct the digital image was implemented using 2 dimensional DWT(Discrete Wavelet Transform). The proposed system consists of the FPGA board tocompress the image and the application software(S/W) to reconstruct it. First the FPGA receives the image from AID converter and compresses the image using wavelet transform. The compressed data is transferred into the PC using the PCI interface. The compressed image is reconstructed by an application S/W inside the PC. The image compressor can compress about 60 fields per second, in which the image format was NTSC YCbCr(4:2:2) and the image size was 640${\times}$240 pixels per field. The designed hardware mapped into one FPGA occupying 11,120 LAB (Logic Array Block) and 27,456 ESB(Embedded System Block) in APEX20KC EP20K1000B652-7. It globally uses 33MHz clock and the memory control part uses 100MHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.6
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• pp.59-68
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• 2002

In this paper, we design the two-dimensional Discrete Wavelet Transform (2D DWT) filter that is widely used in various applications such as image compression because it has no blocking effects and relatively high compression rate. The filter that we used here is two-channel four-taps QMF(Quadrature Mirror Filter) Lattice filter with PR (Perfect Reconstruction) property. The proposed DWT architecture, with two consecutive inputs shows an efficient performance with a minimum of such hardware resources as multipliers, adders, and registers due to a simple scheduling. The proposed architecture was verified by the RTL simulation, and utilizes the hardware 100%. Our architecture shows a relatively high performance with a minimum hardware when compared with other approaches. An efficient memory mapping and address generation techniques are introduced and the fixed-point arithmetic analysis for minimizing the PSNR degradation due to quantization is discussed.

• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1320-1322
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• 1994

Photoisomerization characteristics of 4-octyl-4'-(5-carboxy-pentamethyleneoxy) azobenzene molecules (8A5H) were attained by measurement of absorbtion spectra. 8A5H in chroloform($6.0{\times}10^{-5}[M/l]$) shows trans to cis and cis to trans isomerization by irradiation of lights of 360[nm] and 450[nm] wavelength. From LB monolayer films of 8A5H, also the cis/trans photoisomerization was obtained and it has reversibility and memory characteristics. We are now trying to detect these properties of 8A5H electrically. On this paper, we investigated the structural changes of monolayer on the water surface by measuring the displacement current as a preliminary experiment. The measuring system was constructed at home-made Kuhn type LB(Langmuir-Blodgett) deposition apparatus. 8A5H solution was spreaded at the air-water interface and the currents induced by the dynamic behavior of molecules were measured when the molecules were pressed by barrier. The reversibility of displacement currents by compression and expansion was obtained from 8A5H molecules, which shows the compressed molecules have a tendency to disperse after the compression. From this experiment, we conclude that the behavior of molecules on water surface can be monitored electrically by using this current measuring method, and this method can also be applied to detect the photoisomerization of monolayers on water surface.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.5
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• pp.151-161
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• 2009

Audio Video Standard (AVS) is the audio and video compression standard that was developed for domestic video applications in China. AVS employs low complexity tools to minimize degradation of RD performance of the state-the-art video codec, H.264/AVC. The AVS video codec consists of $8{\times}8$ block prediction and the same size transform to improve compression efficiency for VGA and higher resolution sequences. Currently, the AVS has been adopted more and more for IPTV services and mobile applications in China. So, many consumer electronics companies and multimedia-related laboratories have been developing applications and chips for the AVS. In this paper, we implemented the AVS video decoder and optimize it on TI's Davinci EVM DSP board. For improving the decoding speed and clocks, we removed unnecessary memory operations and we also used high-speed VLD algorithm, linear assembly, intrinsic functions and so forth. Test results show that decoding speed of the optimized decoder is $5{\sim}7$ times faster than that of the reference software (RM 5.2J).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.12C
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• pp.1055-1061
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• 2008

H.264 is the prominent video coding standard in various applications such as real-time streaming and digital multimedia broadcasting, since it provides enhanced compression performance, error resilience tools, and network adaptation. Compression efficiency of H.264 has been improved, however, it requires more computing and memory access than traditional methods. In this paper we proposed adaptive intra fast algorithm for real-time video surveillance system reducing the encoding complexity of H264/A VC. For this aim, temporal interrelationship between macroblock in the previous and the current frame is used to decide the encoding mode of macroblock fast. As a result, though video quality was deteriorated a little, less than 0.04dB, and bit rate was somewhat increased in suggested method, however, proposed method improved encoding time significantly and, in particular, encoding time of an image with little changes of neighboring background such as surveillance video was more shortened than traditional methods.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.16 no.3
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• pp.17-28
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• 2006

The appearance of variant malicious codes using obfuscation techniques is accelerating the spread of malicious codes around the detection by a vaccine. n a system does not patch detection patterns for vulnerabilities and worms to the vaccine, it can be infected by the worms and malicious codes can be spreaded rapidly to other systems and networks in a few minute. Moreover, It is limited to the conventional pattern based detection and treatment for variants or new malicious codes. In this paper, we propose a method of behavior based detection by the static analysis, the dynamic analysis and the dynamic monitoring to detect a malicious code using obfuscation techniques with the PE compression. Also we show that dynamic monitoring can detect worms with the PE compression which accesses to important resources such as a registry, a cpu, a memory and files with the proposed method for similarity.