• Journal of Biomedical Engineering Research
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• v.6 no.2
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• pp.13-14
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• 1985

We have developed a microprogramir!able signal processor for real-time ultrasonic signal processing. Processing speed was increased by the parallelism in horizontal microprogram using 104bits microcode and the Pipelined architecture. Control unit of the signal processor was designed by microprogrammed architec- ture and writable control store (WCS) which was interfaced with host computer, APPLE- ll . This enables the processor to develop and simulate various digital signal processing algorithms. The performance of the processor was evaluated by the Fast Fourier Transform (FFT) program. The execution time to perform 16 bit 1024 points complex FF7, radix-2 DIT algorithm, was about 175 msec with IMHz master Clock. We can use this processor to Bevelop more efficient signal processing algorithms on the biological signal processing.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.40 no.8
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• pp.836-844
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• 1991

PLC(programmable logic controller) system is widely used for the control of factory. PLC system receives ladder diagram which is drawn by the user to implement hardware logic, converts the ladder diagram into sequence program which is executable in the PLC system, and executes the sequence program indefinitely unless user breaks. The sequence program processes the data of on/off signal, and endures 1 scan delay and missing of pulse-type signal shorter than a scan time. So, data dependency doesn't exist. By applying theis characteristics to multiprocessor architecture, we design parellel PLC functionally and evaluate performance upgrade. Parallel PLC consists of central processing module, N general processing unit, and a shared memory by master-slave type. Each module executes allocated sequence program by the control of central processing module. We can expect performance upgrade by parallel processing, and reliability by relocation of sequence program when error occurs in processing module.

• 제어로봇시스템학회:학술대회논문집
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• 1987.10a
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• pp.770-775
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• 1987

In this paper, design and development experiences of a vision based robotic assembly system for electronic components are described. Specifically, the overall system consists of the following three subsystems each of which employs a 16 bit Preprocessor MC 68000 : supervisory controller, real-time vision system, and servo system. The three microprocessors are interconnected using the time shared common memory bus structure with hardwired bus arbitration scheme and operated as a master-slave type in which each slave is functionally fixed in view of software. With this system architecture, the followings are developed and implemented in this research; (i) the system programming language, called 'CLRC', for man-machine interface including the robot motion and vision primitives, (ii) real-time vision system using hardwired chain coder, (iii) the high-precision servo techniques for high speed de motors and high speed stepping motors. The proposed control system were implemented and tested in real-time successfully.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.773-777
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• 2005

This article is about using information technology to apply with water loss inspection system in District Metering Area (DMA). Inspector can check Flow rate and Minimum Night Flow; NMF via Smart Phone or PDA include sending SMS Alert in case the Pressure, Flow rate and NMF is over the range of controlling. This will be used as equipment to implement water loss in international proactive and can keep on water loss reduction more efficiency. The system consists of Data Logger which collects data of Flow rate from DMA Master Meter. PC is Wap Server which dial via modem in order to get data through FTP Protocal that will convert text file to Microsoft Access Database. Wappage will use xhtml language to show database on Wapbrowser and can show the result on Smart Phone or PDA by graph and table for system analysis.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.103.4-103
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• 2001

This paper presents a scaled teleoperation scheme for 3-D microassembly on the experimental microassembly workcell. A workspace mapping between a master and a slave microrobot system is presented to teleoperatively control the microrobot system for microassembly such as peg-in-hole task. Based on this result, a scaling factor is designed and applied to the teleoperated micromanipulation for peg-in-hole task in a mesoscale. Using 3-D virtual simulator, the workspace of microrobot system, and the working path trajectory for microassembly is visually represented. The proposed method is validated through the execution of 3-D microassembly such as peg-in-hole task on the experimental microassembly workcell. The proposed method in the developed ...

• Nuclear Engineering and Technology
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• v.38 no.6
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• pp.551-560
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• 2006

In this study, a controller for a nuclear reactor power is designed. The reactor is modeled using the three dimensional reactor design code MASTER. From the relationship of the input and output of the reactor code, a reactor dynamic model is derived by the system identification method. This model is more realistic than the one based on mathematical theories. With this model, a robust controller is designed by the extended frequency response method. As this method has the same theoretical background as the classical method, all of the existing design techniques of the classical method can be used directly. Furthermore, by introducing the real part of a Laplacian operator into the frequency response, the control design specification can be considered at the initial stage of design. The designed controller is simple, and gives a sufficient robustness with good performance.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.11
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• pp.660-668
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• 2005

Digital communication networks have become a core technology in advanced building automation systems. BACnet (Building Automation and Control networks) is a standard data communication protocol designed specifically for building automation and control systems. BACnet adopts Master-Slave/Token-Passing (MS/TP) protocol as one of its field level networks. Tn this study, we introduce a method of implementing bandwidth allocation scheme in the MS/TP protocol. The bandwidth allocation scheme improves the capability of real-time communication of the original MS/TP protocol. The bandwidth allocation scheme introduced in this paper can be easily implemented in the existing MS/TP protocol with a slight modification. In this study, we examined the validity of bandwidth allocation scheme using simulation models. The results from the simulation experiment show that the proposed scheme satisfies the requirements of real-time communication.

• Proceedings of the Korean Society for Emotion and Sensibility Conference
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• 2002.11a
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• pp.59-65
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• 2002

보다 현실감 있는 가상환경을 제공하기 위하여 시각정보 외에 힘의 정보를 사용자에게 제공할 필요가 있으며, 이러한 힘 반영은 햅틱장치에 의해서 수행된다. 일반적으로 영상 제시기에 의한 영상정보는 낮은 갱신율을 갖는 반면에, 햅틱장치는 상대적으로 높은 갱신율로 인간에게 힘정보를 제공하게 되므로, 이들 정보 간의 동기화가 중요하다. 본 논문에서는 가시모델의 원형을 일반화시켜서 햅틱장치에 전달하고, 영상 제시기의 갱신율과는 상관 없이 햅틱장치 내에서 임의의 구속공간을 만들어서 힘피드백을 수행하는 방법에 대해서 논의하고자 한다.

• Food Science and Biotechnology
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• v.18 no.1
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• pp.73-78
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• 2009

Processed meatball products were packaged in a passive package without oxygen scavenger as 1 control and 3 active packages of which have PP-based oxygen scavenger master batch materials (OSMB) of 40, 80, and 100%(w/w) in the middle layer and stored at 23 and $30^{\circ}C$ up to 9 months. Quality changes of packaged products were evaluated by measuring the oxygen concentration of the headspace in containers, thiobarbituric acid (TBA), color, and flavor. The oxygen concentration of the package having 100% OSMB was lower than those of 40 and 80%. The color changes and TBA values of the meat ball in the package containing 100% OSMB were the least among the treatments. Using principal component analysis (PCA), the control showed more flavor change than the packages containing oxygen scavenger. As a result, all active packages could extend the shelf life of the meatball products compared with that of the passive package.

• Journal of Biomedical Engineering Research
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• v.6 no.2
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• pp.15-22
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• 1985

We have developed a microprogramir!able signal processor for real-time ultrasonic signal processing. Processing speed was increased by the parallelism in horizontal microprogram using 104bits microcode and the Pipelined architecture. Control unit of the signal processor was designed by microprogrammed architec- ture and writable control store (WCS) which was interfaced with host computer, APPLE- ll . This enables the processor to develop and simulate various digital signal processing algorithms. The performance of the processor was evaluated by the Fast Fourier Transform (FFT) program. The execution time to perform 16 bit 1024 points complex FF7, radix-2 DIT algorithm, was about 175 msec with IMHz master Clock. We can use this processor to Bevelop more efficient signal processing algorithms on the biological signal processing.