• 제목/요약/키워드: maskless bumping

검색결과 9건 처리시간 0.016초

Novel Bumping Material for Solder-on-Pad Technology

  • Choi, Kwang-Seong;Chu, Sun-Woo;Lee, Jong-Jin;Sung, Ki-Jun;Bae, Hyun-Cheol;Lim, Byeong-Ok;Moon, Jong-Tae;Eom, Yong-Sung
    • ETRI Journal
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    • 제33권4호
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    • pp.637-640
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    • 2011
  • A novel bumping material, which is composed of a resin and Sn3Ag0.5Cu (SAC305) solder power, has been developed for the maskless solder-on-pad technology of the fine-pitch flip-chip bonding. The functions of the resin are carrying solder powder and deoxidizing the oxide layer on the solder power for the bumping on the pad on the substrate. At the same time, it was designed to have minimal chemical reactions within the resin so that the cleaning process after the bumping on the pad can be achieved. With this material, the solder bump array was successfully formed with pitch of 150 ${\mu}m$ in one direction.

Novel Maskless Bumping for 3D Integration

  • Choi, Kwang-Seong;Sung, Ki-Jun;Lim, Byeong-Ok;Bae, Hyun-Cheol;Jung, Sung-Hae;Moon, Jong-Tae;Eom, Yong-Sung
    • ETRI Journal
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    • 제32권2호
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    • pp.342-344
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    • 2010
  • A novel, maskless, low-volume bumping material, called solder bump maker, which is composed of a resin and low-melting-point solder powder, has been developed. The resin features no distinct chemical reactions preventing the rheological coalescence of the solder, a deoxidation of the oxide layer on the solder powder for wetting on the pad at the solder melting point, and no major weight loss caused by out-gassing. With these characteristics, the solder was successfully wetted onto a metal pad and formed a uniform solder bump array with pitches of 120 ${\mu}m$ and 150 ${\mu}m$.

HV-SoP Technology for Maskless Fine-Pitch Bumping Process

  • Son, Jihye;Eom, Yong-Sung;Choi, Kwang-Seong;Lee, Haksun;Bae, Hyun-Cheol;Lee, Jin-Ho
    • ETRI Journal
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    • 제37권3호
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    • pp.523-532
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    • 2015
  • Recently, we have witnessed the gradual miniaturization of electronic devices. In miniaturized devices, flip-chip bonding has become a necessity over other bonding methods. For the electrical connections in miniaturized devices, fine-pitch solder bumping has been widely studied. In this study, high-volume solder-on-pad (HV-SoP) technology was developed using a novel maskless printing method. For the new SoP process, we used a special material called a solder bump maker (SBM). Using an SBM, which consists of resin and solder powder, uniform bumps can easily be made without a mask. To optimize the height of solder bumps, various conditions such as the mask design, oxygen concentration, and processing method are controlled. In this study, a double printing method, which is a modification of a general single printing method, is suggested. The average, maximum, and minimum obtained heights of solder bumps are $28.3{\mu}m$, $31.7{\mu}m$, and $26.3{\mu}m$, respectively. It is expected that the HV-SoP process will reduce the costs for solder bumping and will be used for electrical interconnections in fine-pitch flip-chip bonding.

Novel Bumping and Underfill Technologies for 3D IC Integration

  • Sung, Ki-Jun;Choi, Kwang-Seong;Bae, Hyun-Cheol;Kwon, Yong-Hwan;Eom, Yong-Sung
    • ETRI Journal
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    • 제34권5호
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    • pp.706-712
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    • 2012
  • In previous work, novel maskless bumping and no-flow underfill technologies for three-dimensional (3D) integrated circuit (IC) integration were developed. The bumping material, solder bump maker (SBM) composed of resin and solder powder, is designed to form low-volume solder bumps on a through silicon via (TSV) chip for the 3D IC integration through the conventional reflow process. To obtain the optimized volume of solder bumps using the SBM, the effect of the volumetric mixing ratio of resin and solder powder is studied in this paper. A no-flow underfill material named "fluxing underfill" is proposed for a simplified stacking process for the 3D IC integration. It can remove the oxide layer on solder bumps like flux and play a role of an underfill after the stacking process. The bumping process and the stacking process using the SBM and the fluxing underfill, respectively, for the TSV chips are carefully designed so that two-tier stacked TSV chips are sucessfully stacked.

Novel Bumping Process for Solder on Pad Technology

  • Choi, Kwang-Seong;Bae, Ho-Eun;Bae, Hyun-Cheol;Eom, Yong-Sung
    • ETRI Journal
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    • 제35권2호
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    • pp.340-343
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    • 2013
  • A novel bumping process using solder bump maker is developed for the maskless low-volume solder on pad (SoP) technology of fine-pitch flip chip bonding. The process includes two main steps: one is the aggregation of powdered solder on the metal pads on a substrate via an increase in temperature, and the other is the reflow of the deposited powder to form a low-volume SoP. Since the surface tension that exists when the solder is below its melting point is the major driving force of the solder deposit, only a small quantity of powdered solder adjacent to the pads can join the aggregation process to obtain a uniform, low-volume SoP array on the substrate, regardless of the pad configurations. Through this process, an SoP array on an organic substrate with a pitch of $130{\mu}m$ is successfully formed.

Maskless Screen Printing Process using Solder Bump Maker (SBM) for Low-cost, Fine-pitch Solder-on-Pad (SoP) Technology

  • Choi, Kwang-Seong;Lee, Haksun;Bae, Hyun-Cheol;Eom, Yong-Sung
    • 마이크로전자및패키징학회지
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    • 제20권4호
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    • pp.65-68
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    • 2013
  • A novel bumping process using solder bump maker (SBM) is developed for fine-pitch flip chip bonding. It features maskless screen printing process. A selective solder bumping mechanism without the mask is based on the material design of SBM. Maskless screen printing process can implement easily a fine-pitch, low-cost, and lead-free solder-on-pad (SoP) technology. Its another advantage is ternary or quaternary lead-free SoP can be formed easily. The process includes two main steps: one is the thermally activated aggregation of solder powder on the metal pads on a substrate and the other is the reflow of the deposited powder on the pads. Only a small quantity of solder powder adjacent to the pads can join the first step, so a quite uniform SoP array on the substrate can be easily obtained regardless of the pad configurations. Through this process, an SoP array on an organic substrate with a pitch of 130 ${\mu}m$ is, successfully, formed.

Interconnection Technology Based on InSn Solder for Flexible Display Applications

  • Choi, Kwang-Seong;Lee, Haksun;Bae, Hyun-Cheol;Eom, Yong-Sung;Lee, Jin Ho
    • ETRI Journal
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    • 제37권2호
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    • pp.387-394
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    • 2015
  • A novel interconnection technology based on a 52InSn solder was developed for flexible display applications. The display industry is currently trying to develop a flexible display, and one of the crucial technologies for the implementation of a flexible display is to reduce the bonding process temperature to less than $150^{\circ}C$. InSn solder interconnection technology is proposed herein to reduce the electrical contact resistance and concurrently achieve a process temperature of less than $150^{\circ}C$. A solder bump maker (SBM) and fluxing underfill were developed for these purposes. SBM is a novel bumping material, and it is a mixture of a resin system and InSn solder powder. A maskless screen printing process was also developed using an SBM to reduce the cost of the bumping process. Fluxing underfill plays the role of a flux and an underfill concurrently to simplify the bonding process compared to a conventional flip-chip bonding using a capillary underfill material. Using an SBM and fluxing underfill, a $20{\mu}m$ pitch InSn solder SoP array on a glass substrate was successfully formed using a maskless screen printing process, and two glass substrates were bonded at $130^{\circ}C$.

Fine-Pitch Solder on Pad Process for Microbump Interconnection

  • Bae, Hyun-Cheol;Lee, Haksun;Choi, Kwang-Seong;Eom, Yong-Sung
    • ETRI Journal
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    • 제35권6호
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    • pp.1152-1155
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    • 2013
  • A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.

Optimization of Material and Process for Fine Pitch LVSoP Technology

  • Eom, Yong-Sung;Son, Ji-Hye;Bae, Hyun-Cheol;Choi, Kwang-Seong;Choi, Heung-Soap
    • ETRI Journal
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    • 제35권4호
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    • pp.625-631
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    • 2013
  • For the formation of solder bumps with a fine pitch of 130 ${\mu}m$ on a printed circuit board substrate, low-volume solder on pad (LVSoP) technology using a maskless method is developed for SAC305 solder with a high melting temperature of $220^{\circ}C$. The solder bump maker (SBM) paste and its process are quantitatively optimized to obtain a uniform solder bump height, which is almost equal to the height of the solder resist. For an understanding of chemorheological phenomena of SBM paste, differential scanning calorimetry, viscosity measurement, and physical flowing of SBM paste are precisely characterized and observed during LVSoP processing. The average height of the solder bumps and their maximum and minimum values are 14.7 ${\mu}m$, 18.3 ${\mu}m$, and 12.0 ${\mu}m$, respectively. It is expected that maskless LVSoP technology can be effectively used for a fine-pitch interconnection of a Cu pillar in the semiconductor packaging field.