• 제목/요약/키워드: mapping algorithm

검색결과 1,089건 처리시간 0.023초

Hybrid Priority-based Genetic Algorithm for Multi-stage Reverse Logistics Network

  • Lee, Jeong-Eun;Gen, Mitsuo;Rhee, Kyong-Gu
    • Industrial Engineering and Management Systems
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    • 제8권1호
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    • pp.14-21
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    • 2009
  • We formulate a mathematical model of remanufacturing system as multi-stage reverse Logistics Network Problem (mrLNP) with minimizing the total costs for reverse logistics shipping cost and inventory holding cost at disassembly centers and processing centers over finite planning horizons. For solving this problem, in the 1st and the 2nd stages, we propose a Genetic Algorithm (GA) with priority-based encoding method combined with a new crossover operator called as Weight Mapping Crossover (WMX). A heuristic approach is applied in the 3rd stage where parts are transported from some processing centers to one manufacturer. Computer simulations show the effectiveness and efficiency of our approach. In numerical experiments, the results of the proposed method are better than pnGA (Prufer number-based GA).

색조 보존을 위한 칼라 색역 매핑 (Hue Preserving Color Gamut Mapping)

  • 성영모;박은홍;임재권
    • 융합신호처리학회 학술대회논문집
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    • 한국신호처리시스템학회 2003년도 하계학술대회 논문집
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    • pp.106-109
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    • 2003
  • This paper presents a hue preserving gamut mapping algorithm for color monitor and printer. The gamuts of monitor and printer are set by the profile of color reproduction media, specified by ICC(International Color Consortium) and provided by vendors, then those gamuts are represented on the CIE xy color space. In case that the color of monitor are located on out-of-gamut of printer, these are clipped on the point of gamut boundary of printer towards a reference white point. On the other hand, colors are in-gamut of printer are unchanged. An image generated by the algorithm keeps a ratio of each pixel of original image. Advantages of the algorithm are easy to implement and fast processing time than other algorithms which involve hue preserving especially in CIELAB color space.

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VLIW 시뮬레이터 상에서의 디지털 신호처리 행렬 연산에 대한 병렬화 알고리즘 (A Parallelising Algortithm for Matrix Arithmetics of Digital Signal Processings on VLIW Simulator)

  • 송진희;전문석
    • 한국정보처리학회논문지
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    • 제5권8호
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    • pp.1985-1996
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    • 1998
  • 본 논문에서는 행렬 또는 벡터 곱셈을 선형 프로세서나 VLIW 시뮬레이터로 분할 및 배치하는 알고리즘을 제안한다. 먼저 입력 행렬이나 벡터를 임의 크기의 프로세서 배열에 배치하는 기법에 대해 논의하고, 문제 크기를 프로세서 배열 크기로 분할하는 알고리즘을 보인다. 이 알고리즘을 VLIW 시뮬레이터 상에서 실행하고 알고리즘의 효율성을 보이도록한다. 그 결과 우리가 설계한 VLIW 시뮬레이터 상에서의 수행이 선형 프로세서 상에서 보다 병렬화 성능이 향상됨을 알 수 있었다.

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AETLA를 이용한 이진 신경회로망의 최적 합성방법 (Optimal Method for Binary Neural Network using AETLA)

  • 성상규;정종원;이준탁
    • 한국지능시스템학회:학술대회논문집
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    • 한국퍼지및지능시스템학회 2001년도 춘계학술대회 학술발표 논문집
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    • pp.105-108
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    • 2001
  • In this paper, the learning algorithm called advanced expanded and truncate algorithm(AETLA) is proposed to training multilayer binary neural network to approximate binary to binary mapping. AETLA used merit of ETL and MTGA learning algorithm. We proposed to new learning algorithm to decrease number of hidden layer. Therefore, learning speed of the proposed AETLA learning algorithm is much faster than other learning algorithm.

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A Hybrid Multiuser Detection Algorithm for Outer Space DS-UWB Ad-hoc Network with Strong Narrowband Interference

  • Yin, Zhendong;Kuang, Yunsheng;Sun, Hongjian;Wu, Zhilu;Tang, Wenyan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제6권5호
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    • pp.1316-1332
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    • 2012
  • Formation flying is an important technology that enables high cost-effective organization of outer space aircrafts. The ad-hoc wireless network based on direct-sequence ultra-wideband (DS-UWB) techniques is seen as an effective means of establishing wireless communication links between aircrafts. In this paper, based on the theory of matched filter and error bits correction, a hybrid detection algorithm is proposed for realizing multiuser detection (MUD) when the DS-UWB technique is used in the ad-hoc wireless network. The matched filter is used to generate a candidate code set which may contain several error bits. The error bits are then recognized and corrected by an novel error-bit corrector, which consists of two steps: code mapping and clustering. In the former step, based on the modified optimum MUD decision function, a novel mapping function is presented that maps the output candidate codes into a feature space for differentiating the right and wrong codes. In the latter step, the codes are clustered into the right and wrong sets by using the K-means clustering approach. Additionally, in order to prevent some right codes being wrongly classified, a sign judgment method is proposed that reduces the bit error rate (BER) of the system. Compared with the traditional detection approaches, e.g., matched filter, minimum mean square error (MMSE) and decorrelation receiver (DEC), the proposed algorithm can considerably improve the BER performance of the system because of its high probability of recognizing wrong codes. Simulation results show that the proposed algorithm can almost achieve the BER performance of the optimum MUD (OMD). Furthermore, compared with OMD, the proposed algorithm has lower computational complexity, and its BER performance is less sensitive to the number of users.

New Generalized SVPWM Algorithm for Multilevel Inverters

  • Kumar, A. Suresh;Gowri, K. Sri;Kumar, M. Vijay
    • Journal of Power Electronics
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    • 제18권4호
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    • pp.1027-1036
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    • 2018
  • In this paper a new generalized space vector pulse width modulation scheme is proposed based on the principle of reverse mapping to drive the switches of multilevel inverters. This projected scheme is developed based on the middle vector of the subhexagon which holds the tip of the reference vector, which plays a major role in mapping the reference vector. A new approach is offered to produce middle vector of the subhexagon which holds tip of the reference vector in the multilevel space vector plane. By using middle vector of the subhexagon, reference vector is linked towards the inner two level sub-hexagon. Then switching vectors, switching sequence and dwell times corresponding to a particular sector of a two-level inverter are determined. After that, by using the two level stage findings, the switching vectors related to exact position of the reference vector are directly generated based on principle of the reverse mapping approach and do not need to be found at n level stage. In the reverse mapping principle, the middle vector of subhexagon is added to the formerly found two level switching vectors. The proposed generalized algorithm is efficient and it can be applied to an inverter of any level. In this paper, the proposed scheme is explained for a five-level inverter and the performance is analyzed for five level and three level inverters through MATLAB. The simulation results are validated by implementing the propose scheme on a V/f controlled three-level inverter fed induction motor using dSPACE control desk.

신경회로망을 이용한 손으로 작성된 논리회로 도면 인식 알고리듬 (A Recognition Algorithm for Handwritten Logic Circuit Diagrams Using Neural Network)

  • 김덕령;박성한
    • 대한전자공학회논문지
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    • 제27권10호
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    • pp.68-77
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    • 1990
  • 본 논문에서는 CAD 시스템의 신경망을 이용한 자동 입력기 구축을 위한 논리 심볼 인식방법을 제시한다. 손으로 작성한 도면을 인식하기 위해 특징 추출과 log mapping, 그리고 패턴 인식의 다단계 과정을 거친다. 각 논리 심볼의 현태 정보를 추출하기 위해 억제 가중치를 학습할 수 있는 경쟁 학습법을 제안하고 회전과 크기의 변화를 병진된 결과로 나타내는 log mapping을 하고 형태가 변한 심볼을 인식할 수 있도록 겹쳐지는 수용야(Receptive field)를 준비하여 error back propagation을 이용한 다층망으로 심볼을 인식한다.

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상관관계에 의한 CLB구조의 CPLD 저전력 기술 매핑 알고리즘 (CLB-Based CPLD Low Power Technology Mapping A1gorithm for Trade-off)

  • 김재진;이관형
    • 한국컴퓨터정보학회논문지
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    • 제10권2호
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    • pp.49-57
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    • 2005
  • 본 논문은 상관관계(trade-off)에 의한 CLB구조의 CPLD 저전력 기술 매핑 알고리즘을 제안하였다. 제안한 저전력 기술 매핑 알고리즘은 주어진 불린 네트워크를 DAG로 구성하여 소모전력 계산을 위한 TD(Transition Density) 계산 단계와 매핑 가능 클러스터 생성, CLB 패킹의 단계로 구성하였다. TD 계산 단계는 DAG를 구성하고 있는 각 노드들에 대한 스위칭 동작을 계산하여 전체 소모 전력을 계산하는 단계이다. 매핑 가능 클러스터 생성 단계는 주어진 CPLD의 CLB에 대한 입출력의 수와 OR 텀수를 고려하여 매핑 가능 클러스터를 생성하는 단계이다. 매핑 가능 클러스터를 생성하기 위하여 공통 노드 클러스터 병합과 노드 분할, 노드 복제의 방법을 이용한다. 제안된 알고리즘을 SIS에서 제공되는 벤치마크에 적용하여 실험한 결과 OR 텀수를 5로 했을 경우 기존의 CPLD 기술 매핑 알고리즘인 TEMPLA에 비해 30.73$\%$의 소모전력이 감소되었으며, PLAmap에 비해 17.11$\%$감소되었다.

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지도 일반화 알고리듬의 임계값 설정에 따른 소축척 지도 제작의 효용성 연구 (A Study on the Effectiveness of Small-scale Maps Production Based on Tolerance Changes of Map Generalization Algorithm)

  • 김화경;류재학;허지용;신용태
    • 한국IT서비스학회지
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    • 제22권5호
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    • pp.71-86
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    • 2023
  • Recently, various geographic information systems have been used based on spatial information of geographic information systems. Accordingly, it is essential to produce a large-scale map as a small-scale map for various uses of spatial information. However, maps currently being produced have inconsistencies between data due to production timing and limitations in expression, and productivity efficiency is greatly reduced due to errors in products or overlapping processes. In order to improve this, various efforts are being made, such as publishing research and reports for automating domestic mapping, but because there is no specific result, it relies on editors to make maps. This is mainly done by hand, so the time required for mapping is excessive, and quality control for each producer is different. In order to solve these problems, technology that can be automatically produced through computer programs is needed. Research has been conducted to apply the rule base to geometric generalization. The algorithm tolerance setting applied to rule-based modeling is a factor that greatly affects the result, and the level of the result changes accordingly. In this paper, we tried to study the effectiveness of mapping according to tolerance setting. To this end, the utility was verified by comparing it with a manually produced map. In addition, the original data and reduction rate were analyzed by applying generalization algorithms and tolerance values. Although there are some differences by region, it was confirmed that the complexity decreased on average. Through this, it is expected to contribute to the use of spatial information-based services by improving tolerances suitable for small-scale mapping regulations in order to secure spatial information data that guarantees consistency and accuracy.

이동망의 채널할당과 작업 스케줄링 관련 모델 및 성능분석 (Performance of Job scheduling Model And Channel Allocation of Cellular Network)

  • 손동철;김동현;류충상
    • 한국전자통신학회논문지
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    • 제3권1호
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    • pp.26-30
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    • 2008
  • CDMA 이동망 환경에서는 한정된 자원을 효율적으로 사용하여 멀티미디어 서비스 요구에 따른 무선 트래픽 채널을 할당하는 기법은 무선이라는 특수 환경으로 인해 제약을 받을 수밖에 없다. 이동망의 기지국의 경우 여러 무선 가입자 보드로부터 요구되는 서비스별 트래픽 요구에 대한 채널 할당과 이에 대한 메인보드에서 처리해야 하는 작업 스케줄링은 무선과 CPU라는 서로 다른 환경을 잘 매핑하는 과제를 안고 있다. 본 논문에서는 음성과 데이터 호를 동시에 서비스하는 셀룰러 시스템에서 멀티미디어 서비스 트래픽 특성을 고려한 주파수할당과 작업 스케줄링이라는 두 가지 요소를 접목할 때 적합한 작업 스케줄링 방식을 제안한다.

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