• Title/Summary/Keyword: low-precision

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Quality Analysis on Computer Generated Hologram Depending on the Precision on Diffraction Computation (회절연산 정밀도에 따른 CGH 기반 홀로그램 생성 품질 분석)

  • Jaehong Lee;Duksu Kim
    • Journal of Broadcast Engineering
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    • v.28 no.1
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    • pp.21-30
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    • 2023
  • Computer-generated holography requires much more computation costs and memory space rather than image processing. We implemented the diffraction calculation with low-precision and mixed-precision floating point numbers and compared the processing time and quality of the hologram with various precision. We compared diffraction quality with double, single and bfloat16 precision. bfloat16 shows 5.94x and 1.52x times faster performance than double precision and single precision. Also, bfloat16 shows lower PSNR and SSIM and higher MSE than other precision. However, there is no significant effect on reconstructed images. These results show low precision, like bfloat16, can be utilized for computer-generated holography.

Trends of Low-Precision Processing for AI Processor (NPU 반도체를 위한 저정밀도 데이터 타입 개발 동향)

  • Kim, H.J.;Han, J.H.;Kwon, Y.S.
    • Electronics and Telecommunications Trends
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    • v.37 no.1
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    • pp.53-62
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    • 2022
  • With increasing size of transformer-based neural networks, a light-weight algorithm and efficient AI accelerator has been developed to train these huge networks in practical design time. In this article, we present a survey of state-of-the-art research on the low-precision computational algorithms especially for floating-point formats and their hardware accelerator. We describe the trends by focusing on the work of two leading research groups-IBM and Seoul National University-which have deep knowledge in both AI algorithm and hardware architecture. For the low-precision algorithm, we summarize two efficient floating-point formats (hybrid FP8 and radix-4 FP4) with accuracy-preserving algorithms for training on the main research stream. Moreover, we describe the AI processor architecture supporting the low-bit mixed precision computing unit including the integer engine.

A $200-MHz{\circled}a2.5-V$ Dual-Mode Multiplier for Single/Double-Precision Multiplications (단정도/배정도 승산을 위한 $200-MHz{\circled}a2.5-V$ 이중 모드 승산기)

  • 이종남;박종화;신경욱
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.149-152
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    • 2000
  • A dual-mode multiplier (DMM) that performs single- and double-precision multiplications has been designed. An algorithm for efficiently implementing double-precision multiplication with a single-precision multiplier was proposed, which is based on partitioning double-precision multiplication into four single-precision sub-multiplications and computing them with sequential accumulations. When compared with conventional double-precision multipliers, our approach reduces the hardware complexity by about one third resulting in small silicon area and low-power dissipation at the expense of increased latency and throughput cycles.

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