• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.198-202
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• 2001

This paper presents a novel prototype version of ZCS-PWM forward DC-DC power converter using power MOSFETs which is designed for application specific low voltage large current conversion operation. The soft-switching forward power converter with a high frequency isolated transformer link which can efficiency operate over wide load ranges under two conditions of ZCS as well as active voltage clamped switching is evaluated and discussed on the basis of the simulation and experimental results.

• Journal of Power Electronics
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• v.5 no.2
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• pp.99-103
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• 2005

In this paper, a novel circuit topology of a three-winding coupling inductor-assisting a high-frequency PWM boost chopper type DC-DC power converter with a high boost voltage conversion ratio and low switch voltage stress is proposed for the new energy interfaced DC power conditioner in solar photovoltaic and fuel cell generation systems. The operating principle in a steady state is described by using its equivalent circuits under the practical condition of energy processing of a lossless capacitive snubber. The newly-proposed power MOSFET boost chopper type DC-DC power converter with the three-winding coupled inductor type transformer and a single lossless capacitor snubber is built and tested for an output power of 500W. Utilizing the lower voltage and internal resistance power MOSFET switch in the proposed PWM boost chopper type DC-DC power converter can reduce the conduction losses of the active power switch compared to the conventional model. Therefore, the total actual power conversion efficiency under a condition of the nominal rated output power is estimated to be 81.1 ％, which is 3.7％ higher than the conventional PWM boost chopper DC power conversion circuit topology.

• ETRI Journal
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• v.44 no.3
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• pp.491-503
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• 2022

Metal-oxide-semiconductor field-effect transistors (MOSFETs) are continuously scaling down in the nanoscale region to improve the functionality of integrated circuits. The scaling down of MOSFET devices causes short-channel effects in the nanoscale region. In nanoscale region, leakage current components are increasing, resulting in substantial power dissipation. Very large-scale integration designers are constantly exploring different effective methods of mitigating the power dissipation. In this study, a transistor-level input-controlled stacking (ICS) approach is proposed for minimizing significant power dissipation. A low-power ICS approach is extensively discussed to verify its importance in low-power applications. Circuit reliability is monitored for process and voltage and temperature variations. The ICS approach is designed and simulated using Cadence's tools and compared with existing low-power and high-speed techniques at a 22-nm technology node. The ICS approach decreases power dissipation by 84.95% at a cost of 5.89 times increase in propagation delay, and improves energy dissipation reliability by 82.54% compared with conventional circuit for a ring oscillator comprising 5-inverters.