• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.12B
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• pp.2391-2400
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• 1999

Vector quantizer (VQ) is an efficient data compression technique for low bit rate applications. However, the major disadvantage of VQ is its encoding complexity which increases dramatically as the vector dimension and bit rate increase. Even though one can use a modified VQ to reduce the encoding complexity, it is nearly impossible to implement such a VQ at a high bit rate or for a large vector dimension because of the enormously large memory requirement for the codebook and the very large training sequence (TS) size. To overcome this difficulty, in this paper we propose a novel structurally constrained VQ for the high bit rate and the large vector dimension cases in order to obtain VQ-level performance. Furthermore, this VQ can be extended to the low bit rate applications. The proposed quantization scheme has a form of feed-forward adaptive quantizer with a short adaptation period. Hence, we call this quantization scheme sample-adaptive product quantizer (SAPQ). SAPQ can provide a 2 ~3dB improvement over the Lloyd-Max scalar quantizers.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1991.10a
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• pp.215-219
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• 1991

This paper is equivalent model transform which reduces the restriction of digitalization in the discrete linear system. This algorithm is the method that weight is given to contribillity and obserbility gramian, the regular matrix T of coordinate transform is obtained and then the state space coefficents of weighted model can be obtained. This study shows the frequency reponse of low quantization error according to the order of weighting function. The result shows that frequency response of the proposed algorithm is better than that of the balanced realization in the system of smaller bit.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.850-853
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• 1987

A VLSI digital filter design using a semi-custom method is described. The digital filters composed of TDM/FDM Transmultiplexer are designed. Using the polyphase network approach a filter bank composed of only all-pass digital filter sections was designed. The use of all-pass filters as basic building blocks is shown to provide a transmultiplexer structure that has low computational requirements, low quantization noise, and high modularity. The silicon compiler systems is used to reduce the design time and increase the credibility of designed filters. A design of 1st order and 2nd order all pass filters is done using CMOS 2um N-well double metal cell.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.48 no.4
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• pp.98-106
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• 2011

Since prediction processes such as motion estimation motion compensation are not at the WZ video encoder but at its decoder, WZ video compression cannot have better performance than that of conventional video encoder. In order to implement the prediction process with low complexity at the encoder, WZ residual coding was proposed. Instead of original WZ frames, WZ residual coding encodes the residual signal between key frames and WZ frames. Although the proposed WZ residual coding has good performance in pixel domain, it does not have any improvements in transform domain compared to transform domain WZ coding. The WZ residual coding in transform domain is difficult to have better performance, because pre-defined quantization matrices in WZ coding are not compatible with WZ residual coding. In this paper, we propose a new quantization method modifying quantization matrix and quantization step size adaptively for transform domain WZ residual coding. Experimental result shows 22% gain in BDBR and 1.2dB gain in BDPSNR.

• Journal of IKEEE
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• v.18 no.3
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• pp.420-426
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• 2014

In this paper, we have implemented the low temperature fluidity test system with the composited fuel filter and heater, which has tested the low temperature fluidity of gasoline, an engine start time, the consumption of electricity and power to evaluate the system performance. The test condition have used the diesel fuel, the normal temperature, the diesel fuel supply pressure $3.4kgf/cm^2$ at $-20{\sim}-30^{\circ}C$, the fuel supply quantization 60 l/H, the setting current 30 A and the voltage $13V_{dc}$. In order to simulate the operation of diesel fuel filter, we will establish the composited fuel filter into test jig, and be filled with chamber tank and filter by a constant flow quantization and pressure. After these, it shall be cold for setting time. And then we have measured the consumption current and power of heater, an operating time and pressure of filter.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.5 no.12
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• pp.2340-2354
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• 2011

A new and secure image steganographic scheme based on nonuniform discrete Fourier transform (NDFT) is proposed in this paper. First, the chaotic system is introduced to select embedding points randomly in NDFT domain suitable range, and NDFT is implemented on every non-overlapping block of eight consecutive pixels. Second, the secret messages are scrambled by chaotic systems, and embedded into frequency coefficients by quantization method. The stego-image is obtained by inverse NDFT (INDFT). Besides, in order to discriminate tampers, the low frequency wavelet coefficients of 7 most significant bits (MSBs) of the stego-image are converted into the binary sequence after nonuniform scalar quantization. Then the obtained binary sequence is scrambled by the chaotic systems, and embedded into the least significant bit (LSB) of the stego-image. Finally, the watermarked stego-image can be obtained by a new improved LSB steganographic method. The embedded secret messages can be extracted from the watermarked stego-image without the original cover image. Experimental results show the validity of the proposed scheme, and dual statistics attacks are also conducted to indicate the security.

• Advances in nano research
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• v.3 no.1
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• pp.49-54
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• 2015

The structure represents symmetrical metal electrode (gate 1) - front $SiO_2$ layer - n-Si nanowire FET - buried $SiO_2$ layer - metal electrode (gate 2). At the symmetrical gate voltages high conductive regions near the gate 1 - front $SiO_2$ and gate 2 - buried $SiO_2$ interfaces correspondingly, and low conductive region in the central region of the NW are formed. Possibilities of applications of nanosize FETs at the deep inversion and depletion as a distributed capacitance are demonstrated. Capacity density is an order to ${\sim}{\mu}F/cm^2$. The charge density, it distribution and capacity value in the nanowire can be controlled by a small changes in the gate voltages. at the non-symmetrical gate voltages high conductive regions will move to corresponding interfaces and low conductive region will modulate non-symmetrically. In this case source-drain current of the FET will redistributed and change current way. This gives opportunity to investigate surface and bulk transport processes in the nanosize inversion channel.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.10
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• pp.5063-5073
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• 2016

In this paper, an efficient texture compression method is proposed for fast rendering, which exploits the spatial correlation among blocks through intra-picture block matching. Texture mapping is widely used to enhance the visual quality of results in real-time rendering applications. For fast texture mapping, it is necessary to identify an effective trade-off between compression efficiency and computational complexity. The conventional compression methods utilized for image processing (e.g., JPEG) provide high compression efficiency while resulting in high complexity. Thus, low complexity methods, such as ETC1, are often used in real-time rendering applications. Although these methods can achieve low complexity, the compression efficiency is still lower than that of JPEG. To solve this problem, we propose a texture compression method by reducing the spatial redundancy between blocks in order to achieve the better compression performance than ETC1 while maintaining complexity that is lower than that of JPEG. Experimental results show that the proposed method achieves better compression efficiency than ETC1, and the decoding time is significantly reduced compared to JPEG while similar to ETC1.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2000.06a
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• pp.1133-1138
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• 2000

This paper describes a signal recognition method for diagnosing the rotating machinery using wavelet-aided Self-Organizing Feature Map(SOFM). The SOFM specialized from neural network is a new and effective algorithm for interpreting large and complex data sets. It converts high-dimensional data items into simple order relationships with low dimension. Additionally the Learning Vector Quantization(LVQ) is used for reducing the error from SOFM. Multi-resolution and wavelet transform are used to extract salient features from the primary vibration signals. Since it decomposes the raw timebase signal into two respective parts in the time space and frequency domain, it does not lose either information unlike Fourier transform. This paper is focused on the development of advanced signal classifier in order to automatize vibration signal pattern recognition. This method is verified by the experiment and several abnormal vibrations such as unbalance and rubbing are classified with high flexibility and reliability by the proposed methods.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.1-8
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• 2007

A wideband continuous-time sigma delta modulator for wireless application is implemented in 130nm CMOS. The SNR for small input signal is improved using a proposed adaptive quantizer which can effectively scale the quantization level. The modulator comprises a second-order loop filter for low power consumption, 4-bit quantizer and DAC for low jitter sensitivity and high linearity. Designed circuit achieves peak SNR of 51.36B with 10MHz signal Bandwidth and 320MHz sampling frequency dissipating 30mW.