• Title/Summary/Keyword: low order quantization

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Encoding of Speech Spectral Parameters Using Adaptive Quantization Range Method

  • Lee, In-Sung;Hong, Chae-Woo
    • ETRI Journal
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    • v.23 no.1
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    • pp.16-22
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    • 2001
  • Efficient quantization methods of the line spectrum pairs (LSP) which have good performances, low complexity and memory are proposed. The adaptive quantization range method utilizing the ordering property of LSP parameters is used in a scalar quantizer and a vector-scalar hybrid quantizer. As the maximum quantization range of each LSP parameter is varied adaptively on the quantized value of the previous order's LSP parameter, efficient quantization methods can be obtained. The proposed scalar quantization algorithm needs 31 bits/frame, which is 3 bits less per frame than in the conventional scalar quantization method with interframe prediction to maintain the transparent quality of speech. The improved vector-scalar quantizer achieves an average spectral distortion of 1 dB using 26 bits/frame. The performances of proposed quantization methods are also evaluated in the transmission errors.

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Optimal Relay Selection and Power Allocation in an Improved Low-Order-Bit Quantize-and-Forward Scheme

  • Bao, Jianrong;He, Dan;Xu, Xiaorong;Jiang, Bin;Sun, Minhong
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.10 no.11
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    • pp.5381-5399
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    • 2016
  • Currently, the quantize-and-forward (QF) scheme with high order modulation and quantization has rather high complexity and it is thus impractical, especially in multiple relay cooperative communications. To overcome these deficiencies, an improved low complex QF scheme is proposed by the combination of the low order binary phase shift keying (BPSK) modulation and the 1-bit and 2-bit quantization, respectively. In this scheme, the relay selection is optimized by the best relay position for best bit-error-rate (BER) performance, where the relays are located closely to the destination node. In addition, an optimal power allocation is also suggested on a total power constraint. Finally, the BER and the achievable rate of the low order 1-bit, 2-bit and 3-bit QF schemes are simulated and analyzed. Simulation results indicate that the 3-bit QF scheme has about 1.8~5 dB, 4.5~7.5 dB and 1~2.5 dB performance gains than those of the decode-and-forward (DF), the 1-bit and 2-bit QF schemes, at BER of $10^{-2}$, respectively. For the 2-bit QF, the scheme of the normalized Source-Relay (S-R) distance with 0.9 has about 5dB, 7.5dB, 9dB and 15dB gains than those of the distance with 0.7, 0.5, 0.3 and 0.1, respectively, at BER of $10^{-3}$. In addition, the proposed optimal power allocation saves about 2.5dB much more relay power on an average than that of the fixed power allocation. Therefore, the proposed QF scheme can obtain excellent features, such as good BER performance, low complexity and high power efficiency, which make it much pragmatic in the future cooperative communications.

A Modified Gaussian Model-based Low Complexity Pre-processing Algorithm for H.264 Video Coding Standard (H.264 동영상 표준 부호화 방식을 위한 변형된 가우시안 모델 기반의 저 계산량 전처리 필터)

  • Song, Won-Seon;Hong, Min-Cheol
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.2C
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    • pp.41-48
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    • 2005
  • In this paper, we present a low complexity modified Gaussian model based pre-processing filter to improve the performance of H.264 compressed video. Video sequence captured by general imaging system represents the degraded version due to the additive noise which decreases coding efficiency and results in unpleasant coding artifacts due to higher frequency components. By incorporating local statistics and quantization parameter into filtering process, the spurious noise is significantly attenuated and coding efficiency is improved for given quantization step size. In addition, in order to reduce the complexity of the pre-processing filter, the simplified local statistics and quantization parameter are introduced. The simulation results show the capability of the proposed algorithm.

A Study on Single-bit Feedback Multi-bit Sigma Delta A/D converter for improving nonlinearity

  • Kim, Hwa-Young;Ryu, Jang-Woo;Jung, Min-Chul;Sung, Man-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.57-60
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    • 2004
  • This paper presents multibit Sigma-Delta ADC using Leslie-Singh Structure to Improve nonlinearity of feedback loop. 4-bit flash ADC for multibit Quantization in Sigma Delta modulator offers the following advantages such as lower quantization noise, more accurate white-noise level and more stability over single quantization. For the feedback paths consisting of DAC, the DAC element should have a high matching requirement in order to maintain the linearity performance which can be obtained by the modulator with a multibit quantizer. Thus a Sigma-Delta ADC usually adds the dynamic element matching digital circuit within feedback loop. It occurs complexity of Sigma-Delta Circuit and increase of power dissipation. In this paper using the Leslie-Singh Structure for improving nonliearity of ADC. This structure operate at low oversampling ratio but is difficult to achieve high resolution. So in this paper propose improving loop filter for single-bit feedback multi-bit quantization Sigma-Delta ADC. It obtained 94.3dB signal to noise ratio over 615kHz bandwidth, and 62mW power dissipation at a sampling frequency of 19.6MHz. This Sigma Delta ADC is fabricated in 0.25um CMOS technology with 2.5V supply voltage.

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Design Method for an MLP Neural Network Which Minimizes the Effect by the Quantization of the Weights and the Neuron Outputs (가중치 뉴런 출력의 양자화 영향을 최소화하는 다층퍼셉트론 신경망 설계 방법)

  • Gwon, O-Jun;Bang, Seung-Yang
    • Journal of KIISE:Software and Applications
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    • v.26 no.12
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    • pp.1383-1392
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    • 1999
  • 이미 학습된 다층퍼셉트론 신경망을 디지털 VLSI 기술을 사용하여 하드웨어로 구현할 경우 신경망의 가중치 및 뉴런 출력들을 양자화해야 하는 문제가 발생한다. 이러한 신경망 변수들의 양자화는 결과적으로 주어진 입력에 대한 신경망의 최종 출력에서의 왜곡을 초래한다. 본 논문에서는 먼저 이러한 양자화로 인한 신경망 출력에서의 왜곡을 통계적으로 분석하였다. 분석 결과에 의하면 입력패턴 각 성분의 제곱들의 합과 가중치의 크기들이 양자화 영향에 주로 기여하는 것으로 나타났다. 이러한 분석 결과를 이용하여 양자화를 위한 정밀도가 주어졌을 때, 양자화 영향이 최소화된 다층퍼셉트론 신경망을 설계하는 방법을 제시하였다. 그리고 제안된 방법에 의해 얻은 신경망과 오류역전파 학습방법에 의하여 얻은 신경망의 성능을 비교함으로써 제안된 방법의 효율성을 입증하였다. 실험결과는 낮은 양자화 정밀도에서도 제안된 방법이 더 좋은 성능을 보였다.Abstract When we implement a multilayer perceptron with the digital VLSI technology, we generally have to quantize the weights and the neuron outputs. These quantizations eventually cause distortion in the output of the network for a given input. In this paper first we made a statistical analysis about the effect caused by the quantization on the output of the network. The analysis revealed that the sum of the squared input components and the sizes of the weights are the major factors which contribute to the quantization effect. We present a design method for an MLP which minimizes the quantization effect when the precision of the quantization is given. In order to show the effectiveness of the proposed method, we developed a network by our method and compared it with the one developed by the regular backpropagation. We could confirm that the network developed by our method performs better even with a low precision of the quantization.

Performance of LDPC Decoder of HSS based on Non-Uniform Quantization (비균일 양자화 방식 기반 HSS 방식의 LDPC 복호기 성능)

  • Kim, Tae-Hun;Kwon, Hae-Chan;Jung, Ji-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.9
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    • pp.2029-2035
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    • 2013
  • In this paper, we presented non-uniform quantization method for LDPC decoder specified in DVB-S2 standard. There are some problems in order to implement LDPC decoder in aspect to algorithm and implementation. In algorithm aspect, because of large number of iterations, LDPC decoding in general give rise to a large number of computation operations, mass power consumption, and decoding delay. Therefore, this paper studies Horizontal Shuffle Scheduling (HSS) algorithm which reduced iteration number without performance loss. In aspect of implementation, there are some solutions to improve the decoding speed, however this paper focused on non-uniform quantization which reduce the quantization bits of LDPC decoder. In simulation results, Decoding throughput of HSS LDPC decoder based on non-uniform quantization is 816Mbps and it improved 12% compared to conventional one.

Bitrate Reduction in Vector Quantization System Using a Dynamic Index Mapping (동적 인텍스 매핑을 이용한 벡터 양자화 시스템에서의 비트율 감축)

  • 이승준;양경호;김철우;이충웅
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.8
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    • pp.1091-1098
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    • 1995
  • This paper proposes an efficient noiseless encoding method of vector quantization(VQ) index using a dynamic index mapping. Using high interblock correlation, the proposed index mapper transforms an index into a new one with lower entropy. In order to achieve good performance with low computational complexity, we adopt 'the sum of differences in pixel values on the block boundaries' as the cost function for index mapping. Simulation results show that the proposed scheme reduces the average bitrate by 40 - 50 % in ordinary VQ system for image compression. In addition, it is shown that the proposed index mapping method can be also applied to mean-residual VQ system, which allows the reduction of bitrate for VQ index by 20 - 30 %(10 - 20 % reduction in total bitrate). Since the proposed scheme is one for noiseless encoding of VQ index, it provides the same quality of the reconstructed image as the conventional VQ system.

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Real-time Implementation of an Identifier for Nonstationary Time-varying Signals and Systems

  • Kim, Jong-Weon;Kim, Sung-Hwan
    • The Journal of the Acoustical Society of Korea
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    • v.15 no.3E
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    • pp.13-18
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    • 1996
  • A real-time identifier for the nonstationary time-varying signals and systems was implemented using a low cost DSP (digital signal processing) chip. The identifier is comprised of I/O units, a central processing unit, a control unit and its supporting software. In order t estimate the system accurately and to reduce quantization error during arithmetic operation, the firmware was programmed with 64-bit extended precision arithmetic. The performance of the identifier was verified by comparing with the simulation results. The implemented real-time identifier has negligible quantization errors and its real-time processing capability crresponds to 0.6kHz for the nonstationary AR (autoregressive) model with n=4 and m=1.

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Multidimensional uniform cubic lattice vector quantization for wavelet transform coding (웨이브렛변환 영상 부호화를 위한 다차원 큐빅 격자 구조 벡터 양자화)

  • 황재식;이용진;박현욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.7
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    • pp.1515-1522
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    • 1997
  • Several image coding algorithms have been developed for the telecommunication and multimedia systems with high image quality and high compression ratio. In order to achieve low entropy and distortion, the system should pay great cost of computation time and memory. In this paper, the uniform cubic lattice is chosen for Lattice Vector Quantization (LVQ) because of its generic simplicity. As a transform coding, the Discrete Wavelet Transform (DWT) is applied to the images because of its multiresolution property. The proposed algorithm is basically composed of the biorthogonal DWT and the uniform cubic LVQ. The multiresolution property of the DWT is actively used to optimize the entropy and the distortion on the basis of the distortion-rate function. The vector codebooks are also designed to be optimal at each subimage which is analyzed by the biorthogonal DWT. For compression efficiency, the vector codebook has different dimension depending on the variance of subimage. The simulation results show that the performance of the proposed coding mdthod is superior to the others in terms of the computation complexity and the PSNR in the range of entropy below 0.25 bpp.

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A Design of Digital Filter IC Using a Semi-Custom Design Method (Semi-custom 방식을 이용한 디지털 필터의 집적회로 설계)

  • 이광엽;김봉렬;이문기
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.2
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    • pp.227-232
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    • 1988
  • A semicustom VLSI design fo digital filters used in TDM/FDM transmultiplexer is described. A filter bank composed of only all-pass digital filter sections are implemented with the polyphase network. The use of all-pass filters as basic building blocks is shown to provide a trans-multiplexer structure that has low computational requirements, low quantization noise, and high modularity. The silicon compiler system is used to reduce the design time and to increase the credibility of designed filters. As a prototype, 1st and 2nd order all pass filter are designed, using CMOS N-well double metal technology. The chip sizes of first order filter and the second order filter are 2652 x 533\ulcorner\ulcorner 5334x4300\ulcorner\ulcorner respectively.

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