• 제목/요약/키워드: low computation

검색결과 813건 처리시간 0.024초

Computation of Beam Stress and RF Performance of a Thin Film Based Q-Band Optimized RF MEMS Switch

  • Singh, Tejinder
    • Transactions on Electrical and Electronic Materials
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    • 제16권4호
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    • pp.173-178
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    • 2015
  • In lieu of the excellent radio frequency (RF) performance of microelectromechanical system ( MEMS) switches, these micro switches need higher actuation voltage for their operation. This requirement is secondary to concerns over the swtiches’ reliability. This paper reports high reliability operation of RF MEMS switches with low voltage requirements. The proposed switch is optimised to perform in the Q-band, which results in actuation voltage of just 16.4 V. The mechanical stress gradient in the thin micro membrane is computed by simulating von Mises stress in a multi-physics environment that results in 90.4 MPa stress. The computed spring constant for the membrane is 3.02 N/m. The switch results in excellent RF performance with simulated isolation of above 38 dB, insertion loss of less than 0.35 dB and return loss of above 30 dB in the Q-band.

웨이브렛 변환된 다해상도 영상을 이용한 계층적 움직임 추정 (Multi-resolution hierarchical motion estimation in the wavelet transform domain)

  • 김진태;장준필;김동욱;최종수
    • 전자공학회논문지B
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    • 제33B권8호
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    • pp.50-59
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    • 1996
  • In this paper, a new hierarchical motion estiamtion scheme using the wavelet transformed multi-resolution image layers is proposed. Compared with the full search motion estimation method, the existing hierarchical methods remarkably reduce the amount of the computation but their efficiencies are depreciated by the local minima problem. In order to solve the local minima problem, the multi-resolution image layers are composed using the wavelet transform and the number of layers participated in the motion estimation for a block is determined by considering of its low band energy and higher band energy on the first wavelet transformed layer. The ratio between higher band energy and low band energy of each block is evaluated and in the case of the blocks which include relatively large higher band energy, the motion estimation is carried out in the high resolution layer. Otherwise, all layers are used. The final motion vectors are obtained in the first wavelet transformed layer. So less bits for motion vectors are transmitted, and the decomposition of received image using inverse wavelet transform decreases the blocking effect.

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Modified CIC 필터뱅크를 이용한 저전력 심장박동수 측정 알고리즘 및 구조 (Low-power Heartbeat Detection Algorithm and Structure Using Modified CIC Filter Banks)

  • 오승리;장영범
    • 전기학회논문지
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    • 제62권2호
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    • pp.264-269
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    • 2013
  • In this paper, low-power heart beat detection algorithm and structure is proposed. The proposed detection algorithm utilizes filter banks to display a specific beat per minute(BPM) from the heart beat signals. Since general filter banks need a lot of computation to calculate a BPM, we propose the filter banks structure using modified CIC(Cascaded Integrator Comb) filters. It is shown that the proposed modified CIC filter banks algorithm can display the BPM from the heart beat signals precisely and efficiently.

Tracer Concentration Contours in Grain Lattice and Grain Boundary Diffusion

  • Kim, Yong-Soo;Donald R. Olander
    • Nuclear Engineering and Technology
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    • 제29권1호
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    • pp.7-14
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    • 1997
  • Grain boundary diffusion plays a significant role in fission gas release, which is one of the crucial processes dominating nuclear fuel performance. Gaseous fission produce such as Xe and Kr generated during nuclear fission have to diffuse in the grain lattice and the boundary inside fuel pellets before they reach the open spaces in a fuel rod. These processes can be studied by 'tracer diffusion' techniques, by which grain boundary diffusivity can be estimated and directly used for low burn-up fission gas release analysis. However, only a few models accounting for the both processes are available and mostly handle them numerically due to mathematical complexity. Also the numerical solution has limitations in a practical use. In this paper, an approximate analytical solution in case of stationary grain boundary in a polycrystalline solid is developed for the tracer diffusion techniques. This closed-form solution is compared to available exact and numerical solutions and it turns out that it makes computation not only greatly easier but also more accurate than previous models. It can be applied to theoretical modelings for low bum-up fission gas release phenomena and experimental analyses as well, especially for PIE (post irradiation examination).

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Ab initio Effective Hamiltonian Calculations on the Valence States of SiH, $SiH^+$, PH and $PH^+$

  • Park Jong Keun;Sun Hosung
    • Bulletin of the Korean Chemical Society
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    • 제13권4호
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    • pp.429-440
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    • 1992
  • The second order ab initio effective valence shall Hamiltonian ($H^v$) which is based on quasidegenerate many-body perturbation theory is applied to the SiH, PH, and their positive ions. A singie Hv computation for the neutral molecule is used for a whole set of valence states of a molecule and its ion simultaneously. The low-lying valence state potential energy curves of SiH, PH and their positive ions are computed. And various spectroscopic constants of the low-lying bound valence states are determined from the potential energy curves. The $H^v$ results are found to be in good agreement with other theoretical and experimental data.

유한체상의 낮은 복잡도를 갖는 시스톨릭 몽고메리 곱셈 (Low Complexity Systolic Montgomery Multiplication over Finite Fields GF(2m))

  • 이건직
    • 디지털산업정보학회논문지
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    • 제18권1호
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    • pp.1-9
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    • 2022
  • Galois field arithmetic is important in error correcting codes and public-key cryptography schemes. Hardware realization of these schemes requires an efficient implementation of Galois field arithmetic operations. Multiplication is the main finite field operation and designing efficient multiplier can clearly affect the performance of compute-intensive applications. Diverse algorithms and hardware architectures are presented in the literature for hardware realization of Galois field multiplication to acquire a reduction in time and area. This paper presents a low complexity semi-systolic multiplier to facilitate parallel processing by partitioning Montgomery modular multiplication (MMM) into two independent and identical units and two-level systolic computation scheme. Analytical results indicate that the proposed multiplier achieves lower area-time (AT) complexity compared to related multipliers. Moreover, the proposed method has regularity, concurrency, and modularity, and thus is well suited for VLSI implementation. It can be applied as a core circuit for multiplication and division/exponentiation.

숫자양식과 빈도범위가 베이스 추론 과제에서 위험판단과 추론에 미치는 영향 (Effects of Numerical Formats and Frequency ranges on Judgment of Risk and Inference in the Bayesian InferenceTask)

  • 이현주;이영애
    • 인지과학
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    • 제20권3호
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    • pp.335-355
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    • 2009
  • 위험정보를 확률이나 빈도양식으로 제시하고 질병으로 사망할 확률(기저율)에 대한 위험을 판단하게 하고 양성판정을 받은 사람이 질병에 걸렸을 확률(사후확률)에 대한 위험판단과 추론의 정확성을 비교하였다. 베이스 추론 과제를 사용한 연구 1에서 숫자양식의 효과가 관찰되었다. 참가자들은 위험이 확률보다는 빈도로 제시될 때 더 위험하다고 판단하였고 질병에 걸렸을 확률을 더 정확하게 추론하였다. 빈도의 범위가 좁을 때보다 넓을 때 더 위험하다고 판단하는 효과는 관찰되지 않았다. 분석적 사고체계가 위험판단에 미치는 영향을 검토하려고 사후확률을 계산하는 조건과 계산하지 않는 조건을 비교하였다. 숫자양식의 효과는 여전히 관찰되었다. 연구 2는 기저율과 사후확률의 크기에 따라 숫자양식 효과와 빈도범위 효과가 달라지는지 알아보았다. 숫자양식의 효과는 기저율과 사후확률의 크기에 상관없이 모든 조건에서 관찰되었다. 위험한 사건이 발생할 확률의 높고 낮음에 상관없이 빈도로 제시되었을 때 참가자들이 더 위험하다고 판단하였다. 그러나 빈도범위 효과는 기저율이 낮은 조건에서만 발견되었다. 본 연구의 결과들을 이중처리체계 이론과 관련시켜 논의하였다.

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순서통계에 근거한 개선된 CFAR 검파기의 하드웨어 구조 제안 (Advanced OS-CFAR Processor Design with Low Computational Effort)

  • 현유진;이종훈
    • 한국정보통신학회논문지
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    • 제16권1호
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    • pp.65-71
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    • 2012
  • 순서통계에 근거한 CFAR(Constant False Alarm) 검파기(이하 OS-CFAR)는 다중 타깃(Target) 환경의 차량용 레이더에 아주 유용 사용되는 알고리즘이다. 그러나 정렬 알고리즘을 사용하기 때문에 일반적인 셀-평균 CFAR 검파기(이하 CA-CFAR)에 비해 계산량이 많아 실시간 구현에 어려운 점이 있다. 본 논문에서는 보다 낮은 계산량을 가지는 OS-CFAR 구조를 제안하였다. 제안된 방법에서는 정렬 알고리즘이 단 한번 만 수행되기 때문에 이를 통해 많은 계산량을 줄일 수 있다. 특히 고속 정렬 알고리즘을 사용하는 경우 통상적인 OS-CFAR 구조와 비교하여 데이터양에 상관없이 항상 계산속도가 빠름을 확인 할 수 있다. 또한 본 논문에서는 실제 레이더 수신 데이터를 이용하여 제안된 방법에 적용한 결과도 제시하였다.

High-Speed Low-Complexity Reed-Solomon Decoder using Pipelined Berlekamp-Massey Algorithm and Its Folded Architecture

  • Park, Jeong-In;Lee, Ki-Hoon;Choi, Chang-Seok;Lee, Han-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제10권3호
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    • pp.193-202
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    • 2010
  • This paper presents a high-speed low-complexity pipelined Reed-Solomon (RS) (255,239) decoder using pipelined reformulated inversionless Berlekamp-Massey (pRiBM) algorithm and its folded version (PF-RiBM). Also, this paper offers efficient pipelining and folding technique of the RS decoders. This architecture uses pipelined Galois-Field (GF) multipliers in the syndrome computation block, key equation solver (KES) block, Forney block, Chien search block and error correction block to enhance the clock frequency. A high-speed pipelined RS decoder based on the pRiBM algorithm and its folded version have been designed and implemented with 90-nm CMOS technology in a supply voltage of 1.1 V. The proposed RS(255,239) decoder operates at a clock frequency of 700 MHz using the pRiBM architecture and also operates at a clock frequency of 750 MHz using the PF-RiBM, respectively. The proposed architectures feature high clock frequency and low-complexity.

An Efficient List Successive Cancellation Decoder for Polar Codes

  • Piao, Zheyan;Kim, Chan-Mi;Chung, Jin-Gyun
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권5호
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    • pp.550-556
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    • 2016
  • Polar codes are one of the most favorable capacity-achieving codes due to their simple structure and low decoding complexity. However, because of the disappointing decoding performance realized using conventional successive cancellation (SC) decoders, polar codes cannot be used directly in practical applications. In contrast to conventional SC decoders, list SC (SCL) decoders with large list sizes (e.g. 32) achieve performances very close to those of maximum-likelihood (ML) decoders. In SCL decoders with large list sizes, however, hardware increase is a severe problem because an SCL decoder with list size L consists of L copies of an SC decoder. In this paper, we present a low-area SCL decoder architecture that applies the proposed merged processing element-sharing (MPES) algorithm. A merged processing element (MPE) is the basic processing unit in SC decoders, and the required number of MPEs is L(N-1) in conventional SCL decoders. Using the proposed algorithm reduces the number of MPEs by about 70% compared with conventional SCL decoders when the list size is larger than 32.