• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.175-178
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• 2007

According to recently presented QoS architecture by 3GPP, a traffic conditioner may be deployed to provide conformance of the negotiated QoS. A real-time frame-layer rate control method which can be applied to the traffic conditioner is proposed. The proposed rate control method uses a non-iterative optimization method for low computational complexity, and performs bit allocation at the frame level to minimize the average distortion over an entire sequence as well as variations in distortion between frames. The proposed algorithm does not produce time delay from encoding, and is suitable for real-time low-complexity video encoder.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.8
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• pp.1582-1588
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• 2007

According to recently presented QoS architecture by 3GPP, a traffic conditioner may be deployed to provide conformance of the negotiated QoS. In this paper, a real-time frame-layer rate control method which can be applied to the traffic conditioner of 3GPP is proposed. The proposed rate control method uses an efficient frame skipping algorithm method for low computational complexity, and performs bit allocation at the frame level to minimize the average distortion over an entire sequence as well as variations in distortion between frames. The proposed algorithm does not produce time delay from encoding, and is suitable for real-time low-complexity video encoder.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.3
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• pp.1195-1211
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• 2016

The emerging video coding standard High Efficiency Video Coding (HEVC) has shown almost 40% bit-rate reduction over the state-of-the-art Advanced Video Coding (AVC) standard but at about 40% computational complexity overhead. The main reason for HEVC computational complexity is the inter prediction that accounts for 60%-70% of the whole encoding time. In this paper, we propose several fast coding unit (CU) encoding schemes based on the Merge mode and motion estimation information to reduce the computational complexity caused by the HEVC inter prediction. Firstly, an early Merge mode decision method based on motion estimation (EMD) is proposed for each CU size. Then, a Merge mode based early termination method (MET) is developed to determine the CU size at an early stage. To provide a better balance between computational complexity and coding efficiency, several fast CU encoding schemes are surveyed according to the rate-distortion-complexity characteristics of EMD and MET methods as a function of CU sizes. These fast CU encoding schemes can be seamlessly incorporated in the existing control structures of the HEVC encoder without limiting its potential parallelization and hardware acceleration. Experimental results demonstrate that the proposed schemes achieve 19%-46% computational complexity reduction over the HEVC test model reference software, HM 16.4, at a cost of 0.2%-2.4% bit-rate increases under the random access coding configuration. The respective values under the low-delay B coding configuration are 17%-43% and 0.1%-1.2%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.1C
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• pp.63-71
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• 2009

In this paper, a new low-complexity distortion estimation method for H.264 rate-distortion optimized mode decision is proposed. The coding processes, such as DCT, quantization, inverse quantization, inverse DCT, and reconstruction are needed to compute the distortion in an H.264 encoder. To reduce these processes, we estimate distortion using integer operations with coefficients obtained in the quantization process. Inverse quantization, inverse DCT, and reconstruction processes are not needed by the proposed method. For quantization parameters 24 to 36, experimental results show that the time saving of rate-distortion optimized mode decision is on average 29 % and as high as 42 % with negligible degradation in coding performance.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.18 no.1
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• pp.1-14
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• 2024

Time-series forecasting is extensively used in the actual world. Recent research has shown that Transformers with a self-attention mechanism at their core exhibit better performance when dealing with such problems. However, most of the existing Transformer models used for time series prediction use the traditional encoder-decoder architecture, which is complex and leads to low model processing efficiency, thus limiting the ability to mine deep time dependencies by increasing model depth. Secondly, the secondary computational complexity of the self-attention mechanism also increases computational overhead and reduces processing efficiency. To address these issues, the paper designs an efficient multi-layer attention-based time-series forecasting model. This model has the following characteristics: (i) It abandons the traditional encoder-decoder based Transformer architecture and constructs a time series prediction model based on multi-layer attention mechanism, improving the model's ability to mine deep time dependencies. (ii) A cross attention module based on cross attention mechanism was designed to enhance information exchange between historical and predictive sequences. (iii) Applying a recently proposed sparse attention mechanism to our model reduces computational overhead and improves processing efficiency. Experiments on multiple datasets have shown that our model can significantly increase the performance of current advanced Transformer methods in time series forecasting, including LogTrans, Reformer, and Informer.

• Journal of Broadcast Engineering
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• v.10 no.4 s.29
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• pp.528-539
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• 2005

The H.264 has been adopted as the video codec for various multimedia services such as DMB and next-generation DVD because of its superior coding performance. However, the reference codec of the standard, the joint model (JM) contains quite a few algorithms which are too complex to be used for the resource-constraint embedded environment. This paper introduces very low-complexity H.264 encoding algorithm which is applicable for the embedded environment. The proposed algorithm was realized by restricting some coding tools on the basis that it should not cause too severe degradation of RD-performance and adding a few early termination and bypass conditions during the motion estimation and mode decision process. In case of encoding of 7.5fps QCIF sequence with 64kbpswith the proposed algorithm, the encoder yields worse PSNRs by 0.4 dB than the standard JM, but requires only $15\%$ of computational complexity and lowers the required memory and power consumption drastically. By porting the proposed H.264 codec into the PDA with Intel PXA255 Processor, we verified the feasibility of the H.264 based MMS(Multimedia Messaging Service) on PDA.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.48 no.3
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• pp.79-89
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• 2011

Recent development of embedded processors makes it possible to play back video contents in real-time on portable devices. Because of their limited battery capacity and low computational performance, however, portable devices still have significant problems in real-time decoding of high quality or high resolution compressed video. Although previous approaches are successful in achieving complexity-scalable decoder by controlling computational complexity of decoding elements, they cause significant objective quality loss coming from mismatch between encoder and decoder. In this paper, we propose a selective B slice skip-decoding method to implement a low complexity video decoder. The proposed method performs selective skip decoding process of B slice which satisfies the proposed conditions. The skipped slices are reconstructed by simple reconstruction method utilizing adjacent reconstructed pictures. Experimental result shows that proposed method not only reduces computational complexity but also maintains subjective visual quality.

• Journal of Broadcast Engineering
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• v.17 no.1
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• pp.179-190
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• 2012

In Distributed Video Coding(DVC), a low complexity encoder can be realized by shifting complex processes of encoder such as motion estimation to decoder. Since not only motion estimation/compensation processes but also channel decoding process needs to be performed at DVC decoder, the complexity of a decoder is significantly increased in consequence. Therefore, various fast channel decoding methods are proposed for the most computationally complex part, which is the channel decoding process in DVC decoding. As the channel decoding process becomes faster using various methods, however, the complexity of the other processes are relatively highlighted. For instance, the complexity of side information generation process in the DVC decoder is relatively increased. In this paper, therefore, a fast method for the DVC decoding is proposed by using adaptive search range method in side information generation process. Experimental results show that the proposed method achieves time saving of about 63% in side information generation process, while its rate distortion performance is degraded only by about 0.17% in BDBR.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.12
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• pp.2315-2320
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• 2006

A real-time frame-layer rate control algorithm with a token bucket traffic shaper is proposed for low bit rate video coding. The proposed rate control method uses a non-iterative optimization method for low computational complexity, and performs bit allocation at the frame level to minimize the average distortion over an entire sequence as well as variations in distortion between frames. In order to reduce the quality fluctuation, we use a sliding window scheme which does not require the pre-analysis process. Therefore, the proposed algorithm does not produce time delay from encoding, and is suitable for real-time low-complexity video encoder. Experimental results indicate that the proposed control method provides better visual and PSNR performances than the existing rate control method.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.107-108
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• 2012

For low complexity encoder, the parity bit transmission through a feedback channel is an essential part of DVC. But feedback channel-based parity bit control is a major cause for the high decoding time latency. In this paper, we propose a fast distributed video decoding by parity bit request estimation using rate-distortion model. Through computer simulations, it is shown that the proposed method can achieve complexity reduction compared to other methods.