• Title/Summary/Keyword: loop gain constraint

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Uplink Sub-channel Allocation and Power Control Algorithm Using Ranging Information in High speed Portable Internet System (휴대인터넷 시스템의 레인징 정보를 이용한 상향링크 부채널 할당 및 전력제어 알고리즘)

  • Kim, Dae-Ho;Kim, Whan-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.9A
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    • pp.729-736
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    • 2005
  • In this paper, we introduce a new approach for the design of uplink sub-channel allocation and power control in the High-speed Portable Internet system that is based on OmMAnDD scheme. In OFDMA system, because the number of allocated sub-channel in mobile station varies from one to the whole sub-channel as in base station while mobile station's transmit power is lower than that of base station, full loading range(FLR) constraint occurs where whole sub-channel can be used and the conventional open-loop power control scheme can not be used beyond FLR. We propose a new scheme that limits the maximum sub-channel allocation number and uses power concentration gain(PCG) depending on location of mobile station, which is based on ranging in OfDMA system. Simulation results show that the proposed scheme extends the uplink coverage to the entire cell service coverage area, provides solutions for optimum utilization of radio resource and enables open-loop power control beyond FLR without extra hardware complexity.

A Digital Phase-locked Loop design based on Minimum Variance Finite Impulse Response Filter with Optimal Horizon Size (최적의 측정값 구간의 길이를 갖는 최소 공분산 유한 임펄스 응답 필터 기반 디지털 위상 고정 루프 설계)

  • You, Sung-Hyun;Pae, Dong-Sung;Choi, Hyun-Duck
    • The Journal of the Korea institute of electronic communication sciences
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    • v.16 no.4
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    • pp.591-598
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    • 2021
  • The digital phase-locked loops(DPLL) is a circuit used for phase synchronization and has been generally used in various fields such as communication and circuit fields. State estimators are used to design digital phase-locked loops, and infinite impulse response state estimators such as the well-known Kalman filter have been used. In general, the performance of the infinite impulse response state estimator-based digital phase-locked loop is excellent, but a sudden performance degradation may occur in unexpected situations such as inaccuracy of initial value, model error, and disturbance. In this paper, we propose a minimum variance finite impulse response filter with optimal horizon for designing a new digital phase-locked loop. A numerical method is introduced to obtain the measured value interval length, which is an important parameter of the proposed finite impulse response filter, and to obtain a gain, the covariance matrix of the error is set as a cost function, and a linear matrix inequality is used to minimize it. In order to verify the superiority and robustness of the proposed digital phase-locked loop, a simulation was performed for comparison and analysis with the existing method in a situation where noise information was inaccurate.