• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.3
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• pp.246-252
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• 2004

This paper presents a position sensorless control system of Switched Reluctance Motor (SRM) using neural network. The control of SRM depends on the commutation of the stator phases in synchronism with the rotor position. The position sensing requirement increases the overall cost and complexity. In this paper, the current-flux-rotor position lookup table based position sensorless operation of SRM is presented. Neural network is used to construct the current-flux-rotor position lookup table, and is trained by sufficient experimental data. Experimental results for a 1-hp SRM is presented for the verification of the proposed sensorless algorithm.

• Journal of electromagnetic engineering and science
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• v.9 no.3
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• pp.152-158
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• 2009

We have developed a novel digital feedback predistortion(DFBPD) linearization based on RF feedback PD for the wide bandwidth modulated signals. The wideband PD operation is carried out by combining the DFBPD and memory lookup table(LUT). To experimentally demonstrate the linearization performance of the proposed PD technique for wideband signal, a class-AB amplifier using an LDMOSFET MRF6S23140 with 140-W peak envelope power is employed at 2.345 GHz. For a forward-link 2FA wideband code-division multiple-access signal with 10 MHz carrier spacing, the proposed DFBPD with memory LUT delivers the adjacent channel leakage ratio at an 10 MHz offset of -56.8 dBc, while those of the amplifier with and without DFBPD are -43.2 dBc and -41.9 dBc, respectively, at an average output power of 40 dBm. The experimental result shows that the new DFBPD with memory LUT provides a good linearization performance for the signal with wide bandwidth.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.3
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• pp.527-532
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• 2021

In this paper, we propose an efficient finite field computation method for Rainbow algorithm, which is the only multivariate quadratic-equation based digital signature among the current US NIST PQC standardization Final List algorithms. Recently, Chou et al. proposed a new efficient implementation method for Rainbow on the Cortex-M4 environment. This paper proposes a new multiplication method over the finite field that can reduce the number of XOR operations by more than 13.7% compared to the Chou et al. method. In addition, a multiplicative inversion over that can be performed by a 4x4 matrix inverse instead of the table lookup method is presented. In addition, the performance is measured by porting the software to which the new method was applied onto RaspberryPI 3B+.

• KIPS Transactions on Computer and Communication Systems
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• v.8 no.6
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• pp.127-138
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• 2019

The data response speed is a critical issue of cloud services because it directly related to the user experience. As such, the in-memory database is widely adopted in many cloud-based applications for achieving fast data response. However, the current implementation of the in-memory database is mostly based on the linked list-based hash table which cannot guarantee the constant data response time. Thus, cuckoo hashing was introduced as an alternative solution, however, there is a disadvantage that only half of the allocated memory can be used for storing data. Subsequently, bucketized cuckoo hashing (BCH) improved the performance of cuckoo hashing in terms of memory efficiency but still cannot overcome the limitation that the insert overhead. In this paper, we propose a data management solution called Wall Cuckoo which aims to improve not only the insert performance but also lookup performance of BCH. The key idea of Wall Cuckoo is that separates the data among a bucket according to the different hash function be used. By doing so, the searching range among the bucket is narrowed down, thereby the amount of slot accesses required for the data lookup can be reduced. At the same time, the insert performance will be improved because the insert is following up the operation of the lookup. According to analysis, the expected value of slot access required for our Wall Cuckoo is less than that of BCH. We conducted experiments to show that Wall Cuckoo outperforms the BCH and Sorting Cuckoo in terms of the amount of slot access in lookup and insert operations and in different load factor (i.e., 10%-95%).

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.5
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• pp.27-33
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• 1993

This paper describes the hardware implementation of 2-D FIR digital filter for a real-time image processing. Generally, the most time-consuming operation in signal processing is the multiplication operation. To avoid it in digital filter. Pelid and Liu proposed the distributed arithmetic method for the one-dimensional case. The implementation method proposed in this paper is to extend Pelid's method to two-dimensional FIR filter using simple ROM lookup table and to use the technique of pipe lining two main operations of memory access and arithmetic. As a result, the speed of our proposed hardware implementation is two times faster than that of conventional methods and can be close to the real time speed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.7
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• pp.1403-1410
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• 1997

Because streaming mode connection server suitable to wide area ATM networks performs transmission, reception and lookup with time restriction for the transmission time of a cell, it has demerits of large cell loss incase that burst traffic occurs. Therefore, in this paper to decrease cell loss we propose a high speed CAM (Content Addressable Memory) which is capable of processing data of streaming mode connections server at a high speed. the proposed CAM is applied to forwarding table VPC map which performs function to output connection numbers about input VPI(Virtual Path Identifier)/VCI(Virtual Channel Identifier). The designed high speed CAM consist of DBL(Dual Bit Line) CAM structure performed independently write operation and match operation and two-port SRAM structure. Also, its simulation verification and full-custom layout is performed by Hspice and Composs tools in 0.8 .$\mu$m design rule.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1569-1576
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• 2014

This paper mainly proposes a direct torque control strategy to minimize torque ripple in brushless DC (BLDC) motor. BLDC motor has large current and torque ripple when one voltage vector applied in one cycle due to its low inductance. Hence, this paper proposed a hysteresis torque control with PWM mode to control the resultant torque. Moreover, when the direct torque control system is operating during the two-phase half-bridge $120^{\circ}$ conduction mode, large torque ripple in commutation area appears every 120 electrical degree. Based on analyzing the root of torque ripple in detail, lookup tables of switching devices states for new half-bridge modulation mode in the positive and negative reference torque put forwarded. Finally, simulations by MATLAB software and experiment results from DSP are presented to verify the feasibility and effectiveness of the proposed strategy operating in four-quadrant operation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.20-25
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• 2009

We propose hardware architecture of floating-point square root and inverse square root arithmetic units using lookup tables. They are used for lighting engines and shader processor for 3D graphic processing. The architecture is based on Taylor series expansion and consists of lookup tables and correction units so that the size of look-up tables are reduced. It can be applied to 32 bit floating point formats of IEEE-754 and reduced 24 bit floating point formats. The square root and inverse square root arithmetic units for 32 bit and 24 bit floating format number are designed as the proposed architecture. They can operation in a single cycle, and satisfy the precision of $10^{-5}$ required by OpenGL 1.x ES. They are designed using Verilog-HDL and the RTL codes are verified using an FPGA.

• Journal of Broadcast Engineering
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• v.27 no.5
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• pp.812-815
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• 2022

Images displayed on a digital devices under the sunlight are generally perceived to be darker than the original images, which leads to a decrease in visibility. For better visibility, global luminance compensation or tone mapping adaptive to ambient lighting is required. However, the existing methods have limitations in chrominance compensation and are difficult to use in real world due to their heavy computational cost. To solve these problems, this paper propose a piece-wise linear curves (PLECs)-based image enhancement method to improve both luminance and chrominance. At this time, PLECs are regressed through deep learning and implemented in the form of a lookup table to real-time operation. Experimental results show that the proposed method has better visibility compared to the original image with low computational cost.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1195-1198
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• 1987

This paper develops algorithms of element generation, addition, multiplication and inversion based on GF($2^m$). Since these algorithms are implemented by general purpose computer, these are more efficient than the conventional algorithms(Table Lookup, Euclid's Algorithm) in each operation. It is also implied that they can be applied to not only the normally defined elements but the arbitrarily defined ones for constructing multi-valued logic function.