• Title/Summary/Keyword: logic tree

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Design of a Tree-Structured Fuzzy Neural Networks for Aircraft Target Recognition (비행체 표적식별을 위한 트리 구조의 퍼지 뉴럴 네트워크 설계)

  • Han, Chang-Wook
    • Journal of IKEEE
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    • v.24 no.4
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    • pp.1034-1038
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    • 2020
  • In order to effectively process target recognition using radar, accurate signal information for the target is required. However, such a target signal is usually mixed with noise, and this part of the study is continuously carried out. Especially, image processing, target signal processing and target recognition for the target are examples. Since the field of target recognition is important from a military point of view, this paper carried out research on target recognition of aircraft using a tree-structured fuzzy neural networks. Fuzzy neural networks are learned by using reflected signal data for an aircraft to optimize the model, and then test data for the target are used for the optimized model to perform an experiment on target recognition. The effectiveness of the proposed method is verified by the simulation results.

The Comparative Quantitative Risk Assessment of LNG Tank Designs for the Safety Improvement of Above Ground Membrane Tank (지상식 멤브레인 LNG저장탱크 안전성 향상을 위한 설계형식별 정량적 위험성 비교 평가)

  • Lee S.R.;Kwon B.G.;Lee S.H.
    • Journal of the Korean Institute of Gas
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    • v.9 no.4 s.29
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    • pp.57-61
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    • 2005
  • The objective of paper is to carry out a comparative Quantitative Risk Assessment (QRA) of two KOGAS tank designs using a fault tree methodology, a standard 'Full Containment' tank and a 'Membrane' tank. For the membrane tank, both the initial KOGAS design and 4 modified KOGAS designs have been assessed, giving six separate cases. In this paper, the frequencies of releases are quantified using a fault tree approach. For clarity in the analysis, and to ensure consistency, all cases have been quantified using the same fault tree. Logic within the fault tree is used to select each of the cases. Full quantification of risks is often difficult, owing to a lack of relevant failure data, but the aim of this study has been to be as quantitative as possible, with full transparency of failure information. The most significant general cause of external LNG leaks is predicted to be a seismic event, which has been quantified nominally. 4modified KOGAS desiens to Prevent damage of bottom membrane panels that was shown in preparatory estimation could quantitively confirm safety improvement. According to result, the predicted frequencies of an external LNG leak for the full containment and modified membrane tanks are very similar, failures due to dropped pumps are predicted to be significantly greater for the membrane tank with thickened plate than for the full containment tank.

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VR Threat Analysis for Information Assurance of VR Device and Game System (VR 기기와 게임 시스템의 정보보증을 위한 VR 위협 분석)

  • Kang, Tae Un;Kim, Huy Kang
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.28 no.2
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    • pp.437-447
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    • 2018
  • Virtual Reality (VR) is becoming a new standard in the game industry. PokeMon GO is a representative example of VR technology. The day after the launch of PokeMon Go in the U.S, It has achieved the highest number of iOS App Store downloads. This is an example of the power of VR. VR comprises gyroscopes, acceleration, tactile sensors, and so on. This allow users could be immersed in the game. As new technologies emerge, new and different threats are created. So we need to research the security of VR technology and game system. In this paper, we conduct a threat analysis for information assurance of VR device (Oculus Rift) and game system (Quake). We systematically analyze the threats (STRIDE, attack library, and attack tree). We propose security measures through DREAD. In addition, we use Visual Code Grepper (VCG) tool to find out logic errors and vulnerable functions in source code, and propose a method to solve them.

Review and Application of Creative Problem-Solving Processes for Technical and Physical Contradictions Using Cause-And-Effect Contradiction Tree and Integrated Principles of TRIZ (TRIZ 인과관계 모순트리와 통합원리를 이용한 물리적 모순의 창의적 해결방안의 고찰 및 적용방안)

  • Choi, Sung-woon
    • Journal of the Korea Safety Management & Science
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    • v.17 no.2
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    • pp.215-228
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    • 2015
  • A creative innovation and an innovative problem-solving of industrial companies can be achieved by overcoming the challenges of technical and physical contradictions. The approaches to address conflicting and paradoxical problems, such as technical and physical contradictions have a crucial role in advancing the quality assessment for manufacturer and service provider. The term, technical contradiction, depicts the state that improvement of one ends of IFR (Ideal Final Result) leads to unfavorable condition of the other ends, and results in conflicting problem. Another type of contradictions that's discussed in this study is a physical contradiction which is due to two mutually opposing states of the means of ends, and gives paradoxical situation. By integrating the means-ends chain perspectives, the physical contradiction that is a specifically root-causes, "means", can be initially addressed to resolve the downstream problem of technical contradiction which represents a general and abstract goals, "ends". This research suggests IFR resolution processes to handle both physical contradiction of means and technical contradiction of ends by employing causal relationship with IFR, effects and causes. In summary, the study represents three major processes that resolve such contradictions are demonstrated as follows: 1) Derivation of causal and hierarchical relationship among IFR, ends and means by considering CAED (Cause-And-Effect Diagram) and LT (Logic Tree). 2) Identification of causal relationship between physical contradiction and technical contradiction by using TPCT (TRIZ Physical Contradiction Tree) and TCD (Technical Contradiction Diagram). 3) Application of integrated TRIZ principles by classifying 40 inventive principles into 4 general conditions of the separation principle of mutually opposite states in space, in time, based on conditions, and between the parts and the whole. In order to validate the proof of proposed IFR resolution processes, the analysis of the TRIZ case studies from National Quality Circle Contest in the years, 2011 to 2014 have been proposed. The suggested guidelines that are built based on TRIZ principles can uniquely enhance the process of quality innovation and assessment for quality practitioners.

Output Power Prediction of Combined Cycle Power Plant using Logic-based Tree Structured Fuzzy Neural Networks (로직에 기반 한 트리 구조의 퍼지 뉴럴 네트워크를 이용한 복합 화력 발전소의 출력 예측)

  • Han, Chang-Wook;Lee, Don-Kyu
    • Journal of IKEEE
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    • v.23 no.2
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    • pp.529-533
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    • 2019
  • Combined cycle power plants are often used to produce power. These days prediction of power plant output based on operating parameters is a major concern. This paper presents an approach to using computational intelligence technique to predict the output power of combined cycle power plant. Computational intelligence techniques have been developed and applied to many real world problems. In this paper, tree architectures of fuzzy neural networks are considered to predict the output power. Tree architectures of fuzzy neural networks have an advantage of reducing the number of rules by selecting fuzzy neurons as nodes and relevant inputs as leaves optimally. For the optimization of the networks, two-step optimization method is used. Genetic algorithms optimize the binary structure of the networks by selecting the nodes and leaves as binary, and followed by random signal-based learning further refines the optimized binary connections in the unit interval. To verify the effectiveness of the proposed method, combined cycle power plant dataset obtained from the UCI Machine Learning Repository Database is considered.

Path planning of a Robot Manipulator using Retrieval RRT Strategy

  • Oh, Kyong-Sae;Kim, Eun-Tai;Cho, Young-Wan
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.7 no.2
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    • pp.138-142
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    • 2007
  • This paper presents an algorithm which extends the rapidly-exploring random tree (RRT) framework to deal with change of the task environments. This algorithm called the Retrieval RRT Strategy (RRS) combines a support vector machine (SVM) and RRT and plans the robot motion in the presence of the change of the surrounding environment. This algorithm consists of two levels. At the first level, the SVM is built and selects a proper path from the bank of RRTs for a given environment. At the second level, a real path is planned by the RRT planners for the: given environment. The suggested method is applied to the control of $KUKA^{TM}$, a commercial 6 DOF robot manipulator, and its feasibility and efficiency are demonstrated via the cosimulatation of $MatLab^{TM}\;and\;RecurDyn^{TM}$.

A Design of a CMOS Circuit of Asynchronous Adders Based on Carry Selection and Carry Bypass (캐리 선택과 캐리 우회 방식에 의거한 비동기 가산기의 CMOS 회로 설계)

  • Jung, Sung-Tae
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.11
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    • pp.2980-2988
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    • 1998
  • This paper describes the design of asynchronous adders based on carry selection and carry bypass techniques. The designs are faster than existing asynchronous adders which are based on ripple carry technique. It is caused by reducing the carry transfer time by using carry selection and carry bypass techniques. Also, the design uses tree structure to reduce the completion sensing time. The proposed adders are designed with CMOS domino logic and experimented with HSPICE simulator. Experimental results show that the proposed adders can be faster about 50% in average cases than previous ripple carry adders.

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Modeling and Simulation for Transient Pulse Gamma-ray Effects on Semiconductor Devices (반도체 소자의 과도펄스감마선 영향 모델링 및 시뮬레이션)

  • Lee, Nam-Ho;Lee, Seung-Min
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.9
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    • pp.1611-1614
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    • 2010
  • The explosion of a nuclear weapon radiates a gamma-ray in the form of a transient pulse. If the gamma-ray introduces to semiconductor devices, much Electron-Hole Pairs(EHPs) are generated in depletion region of the devices[7]. as a consequence of that, high photocurrent is created and causes upset, latchup and burnout of semiconductor devices[8]. This phenomenon is known for Transient Radiation Effects on Electronics(TREE), also called dose-rate effects. In this paper 3D structure of inverter and NAND gate device was designed and transient pulse gamma-ray was modeled. So simulation for transient radiation effect on inverter and NAND gate was accomplished and mechanism for upset and latchup was analyzed.

Design of a Floating Point Multiplier for IEEE 754 Single-Precision Operations (IEEE 754 단정도 부동 소수점 연산용 곱셈기 설계)

  • Lee, Ju-Hun;Chung, Tae-Sang
    • Proceedings of the KIEE Conference
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    • 1999.11c
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    • pp.778-780
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    • 1999
  • Arithmetic unit speed depends strongly on the algorithms employed to realize the basic arithmetic operations.(add, subtract multiply, and divide) and on the logic design. Recent advances in VLSI have increased the feasibility of hardware implementation of floating point arithmetic units and microprocessors require a powerful floating-point processing unit as a standard option. This paper describes the design of floating-point multiplier for IEEE 754-1985 Single-Precision operation. Booth encoding algorithm method to reduce partial products and a Wallace tree of 4-2 CSA is adopted in fraction multiplication part to generate the $32{\times}32$ single-precision product. New scheme of rounding and sticky-bit generation is adopted to reduce area and timing. Also there is a true sign generator in this design. This multiplier have been implemented in a ALTERA FLEX EPF10K70RC240-4.

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Design of High-Speed Correlator for a Binary CDMA (Binary CDMA를 위한 고속 코릴레이터 설계)

  • 구군서;정우경;문장식;류승문;이용석
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.787-790
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    • 2003
  • This paper describes a high speed correlator that can acquire synchronization quickly. The existing addition algorithm is a binary adder tree architecture that will result in extremely slow speed of operation due to many levels of logic required for computation of correlation[2][3]. This paper suggests the new various architectures, which are systolic array architecture, simple pipeline architecture and block systolic array architecture[4][5]. The acquisition performance of the proposed architectures is analyzed and compared with the existing architecture. The comparison results show that the systolic array architecture and the block systolic array architecture reduce the timing delay up to 73% and 31%, respectively. And the results show that the simple pipeline architecture reduces the timing delay up to 53%..

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