• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.883-886
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• 1998

We introduce a high level synthesis methodlogoy for automatic synthesis of asynchronous circuits form a language based on CSP. The input language is a high level concurrent algorithmic specification that can model complex concurrent control flow, logical and arithmetic computation and communications between them. This specification is translated into petri net which has actions. These actions are refined to synthesize the controllers and to allocate the data resources. We use the automatic synthesis through signal transition graphs (STGs) that allows to take advantage of logic synthsis methods to optimize the circuit.

• Journal of Digital Convergence
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• v.11 no.2
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• pp.221-228
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• 2013

A number of research studies focus on the efficacy of using such as scenario based learning. However, desirable methods have not been introduced to assess the scenario based learning. This article is to suggest a fuzzy logic based framework for scenario base learning in which more reasonable learning effects are measured. It can be solved uncertain problems of linguistic variables. Also, we suggest three measures of accuracy, comprehensibility and completeness in order to evaluate accurate effects of scenario based learning. This assessment provides the scenario to the learner in which the scenario is presented in an authentic context, and enable the learner to reach an outcome through an adequate sequence and choices. This approach enables the system to present new scenarios and outcomes based on what a user selects. In particular, the application of fuzzy logic in scenario based learning can be easily pursued certain successful path or wrong path all the way through to reach major outcome in real situation.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2001.04a
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• pp.171-176
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• 2001

This paper describes the methodology of an IEC 1131-3-based control logic generator for the control system design and converting algorithm between programmable languages. The proposed control logic generator is generated based on the software model and common element with data type, variables, POUs(program organization unit) and execution control unit commonly used within programmable languages of IEC 1131-3 Standard. The generation method of object file was proposed on five programmable language based on IECI 131-3. The generation method of object file is represented as following; 1) the generation method using conversion algorithm from LD to IL with FBD(function block diagram), 2) the generation method using C code generation algorithm from SFC using the SFC execution sequence with FBD and ST(structured text). The proposed control logic generator was implemented by Visual C++ and MFC on MS-windows NT 4.0

• Health Policy and Management
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• v.32 no.3
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• pp.272-281
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• 2022

With the outbreak of coronavirus disease 2019 (COVID-19) pandemic, health policymakers are adopting new policies regarding the issue of immunization disparities, especially for children in low-income communities of color who lack awareness and thereby access to vaccines. The purpose of this paper is to propose an evaluation framework using program theory-based evaluation approach and logic model to analyze and evaluate the immunization disparities in children aged 19-35 months. Data is collected from New York City department of Health and the U.S. Census Bureau for Northern Manhattan Start Right Coalition program which consists of 19,800 children, and the community-provider partnership includes 26 practices and 20 groups. Program theory is used to evaluate this community-based initiative with the logic model which is a visual depiction that illustrations the program theory to all stakeholders. The logic model highlights the resources, activities, outputs, outcomes, and impacts of the program to guide to planners and evaluators and to call attention to the inadequacies or flaws in the operational, implementation and service delivery process of the program in offering a new perspective on the program. This framework adds to the literature on evaluations of immunization disparities in determining whether evaluators can definitively attribute positive immunization outcomes in the community to the program and conclude whether it has potential in expanding or duplicating it to other similar settings, especially in other rural areas of the United States, and abroad, where routine immunization equity gaps are wide due to income, racial and ethnic diversity, and language barrier.

• Proceedings of the Korean Society for Language and Information Conference
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• 2002.02a
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• pp.1-1
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• 2002

This talk provides an overview of current work in my research group on the syntactic annotation of the T bingen corpus of spoken German and of the German Reference Corpus (Deutsches Referenzkorpus: DEREKO) of written texts. Morpho-syntactic and syntactic annotation as well as annotation of function-argument structure for these corpora is performed automatically by a hybrid architecture that combines robust symbolic parsing with finite-state methods ("chunk parsing" in the sense Abney) with memory-based parsing (in the sense of Daelemans). The resulting robust annotations can be used by theoretical linguists, who lire interested in large-scale, empirical data, and by computational linguists, who are in need of training material for a wide range of language technology applications. To aid retrieval of annotated trees from the treebank, a query tool VIQTORYA with a graphical user interface and a logic-based query language has been developed. VIQTORYA allows users to query the treebanks for linguistic structures at the word level, at the level of individual phrases, and at the clausal level.

• Language and Information
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• v.2 no.1
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• pp.1-41
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• 1998

Evaluation of multilingual translation fundamentally involves measurement of meaning equivalences between the formally mapped discourses/texts of SL(source language) and TL(target language) both represented by a metalanguage called IL(interlingua). Unlike a usaal uni-directional MT(machine translation) model(e.g.:SL $\rightarrow$ analysis $\rightarrow$ transfer $\rightarrow$ generation $\rightarrow$ TL), a bi-directional(by 'negotiation') model(i.e.: SL $\rightarrow$ IL/S $\leftrightarrow$ IL $\leftrightarrow$ IL/T \leftarrow TL) is proposed here for the purpose of evaluating multilingual, not merely bilingual, translation. The IL, as conceived of in this study, is an English-based predicate logic represented in the framework of MRS(minimal recursion semantics), an MT-oriented off-shoot of HPSG(Head-driven Phrase Structure Grammar). In addition, a list of semantic and pragmatic checkpoints are set up, some being optional depending on the kind and use of the translation, so sa to have the evaluation of translation fine-grained by computing matching or mismatching of such checkpoints.

• Proceedings of the Korean Nuclear Society Conference
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• 1997.05a
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• pp.153-158
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• 1997

This paper describes a formal safety analysis technique which is demonstrated by performing empirical formal safety analysis with the case study of beamline hutch door Interlock system that is developed by using PLC(Programmable Logic Controller) systems at the Pohang Accelerator Laboratory. In order to perform formal safety analysis, we have built the Z formal specifications representation from user requirement written in ambiguous natural language and target PLC ladder logic, respectively. We have also studied the effective method to express typical PLC timer component by using specific Z formal notation which is supported by temporal history. We present a formal proof technique specifying and verifying that the hazardous states are not introduced into ladder logic in the PLC-based safety critical system.

• Proceedings of the Korean Information Science Society Conference
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• 2003.10c
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• pp.559-561
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• 2003

최근 차세대 Web 기술로서 Semantic Web이 주목 받고 있다. Semantic Web에서는 Web상에 존재하는 문서에 Web Resource들에 대한 Ontology를 기반으로 Semantic Annotation을 하고 Ontology 추론 Agent를 통하여 의미 기반으로 Web을 검색할 수 있도록 해준다. 이와 같은 Semantic Web 기술의 핵심 요소는 Web Ontology이며 W3C에서는 이를 표현 할 수 있는 표준 언어로서 RDF기반의 OWL(Web Ontology Language) 명세를 제정하고 있다. 따라서 표준 Web Ontology 언어인 OWL을 위한 추론 시스템은 Semantic Web 검색 Agent의 구현을 위한 필수적인 기반 기술이라 할 수 있으나 아직 그 개발이 미비한 상태이다. OWL 추론 시스템을 구현하기 위해서는 OWL의 이론적인 기반을 제공하는 DL(Description Logic)을 추론할 수 있는 엔진을 사용하는 것이 한가지 방법이 될 수 있으나 OWL이 Rule과 같은 DL의 범주를 벗어나는 Vocabulary를 지원하는 언어로 확장되는 경우에 이를 처리하기가 어렵다. 또 다른 방법으로서 Logic Programming을 통하여 OWL 언어의 Semantic을 기술하고 정리 증명(Theorem Proving)을 통하여 Ontology를 추론하는 공리화(Axiomatisation) 기법이 있는데 이러한 방법의 장점은 기반이 되는 Logic의 범주 내에서 새로운 언어를 위한 Vocabulary의 확장이 용이하다는 점이다. 본 논문에서는 Axiomatisation 방법을 이용하여 OWL로 기술된 Ontology를 추론할 수 있는 시스템의 설계 및 구현에 대해 설명하기로 한다.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.11 no.1
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• pp.61-69
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• 2002

This paper describes a converting algorithm between programmable languages of a software PLU. It is based on IEC 61131-3 standard and PC. The proposed control logic is designed by the software model and common element with data type, variables, POUs(program organization unit) and execution control unit commonly used within programmable languages of IEC 61131-3 Standard. The generation method of object file is proposed on five programmable language based on IEC 61131-3. It is represented as fo11ows; 1) the generation method using conversion algorithm from LD to IL with FBD(function block diagram), 2) the generation method using f code generation algorithm from SFC using the SFC execution sequence with FBD and ST(structured text). The proposed control logic generator was implemented by Visual C++ 6.0 and MFC on MS-windows NT 4.0.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.554-557
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• 2002

In this paper, PDP driving circuit is designed to show the pattern of still-image with ADS (Address Display Separation) driving method. The designed circuits consist of three stages which are the image processing program, digital logic parts, and power circuits. The Image processing program is designed serial-communication with RS-232C using BASIC language. Digital logic parts design ADS driving signals with Xilinx FPGA and are simulated by ModelSim 5.5f. Power circuits convert output of digital logic parts into high voltage which panel is drived.