• Title/Summary/Keyword: logic device

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Design of Bi-directional RDM-DMX512 Converter for LED Lighting Control

  • Hung, Nguyen Manh;Lee, Chang-Hoon
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.13 no.2
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    • pp.106-115
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    • 2013
  • LED lighting control system using unidirectional DMX512 (digital multiplex with 512 pieces of information)) protocol has been the most popular. Nowadays, the user's consumption has been upgrading to the more intelligent system but the upgrading process does not affect the existing infrastructure. There were many researches use the additional communication for the feedback communication way such as WiFi, Controller Area Network (CAN), Power Line Communication (PLC), etc but all researches had inherent disadvantages that created the independent feedback with the existing DMX512 system. Our paper represents the novel method that uses the remote device management (RDM) protocol to associate the additional feedback with existent DMX512 infrastructure in the one system. The data in DMX512 frame sending to the DMX512 client is split and repacked to become the RDM packet. This RDM packet is transferred to the RDM monitor console and the response RDM packet is converted to the DMX512 frame for control DMX512 client devices. This is the closed loop control model which uses the bidirectional convertibility between RDM packet and DMX512 frame. The proposed method not only upgrades the feedback control function for the old DMX512 system without changing the existent infrastructure, but also solves compatible problems between new RDM devices and old DMX512 devices and gives the low cost solution for extending DMX512 universe.

A Study on the Improvement of the Image Quality for UAV Using Drift Compensation (편류보정을 통한 무인항공기 영상품질 향상에 관한 연구)

  • Lee, Mal-Young
    • Journal of Korean Society for Quality Management
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    • v.41 no.3
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    • pp.405-412
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    • 2013
  • Purpose: In this paper, the improvement of the image quality is investigated. The image quality is degraded by the drift phenomenon of EO/IR (Electro-Optical/Infrared) device on UAV. The drift phenomenon means that the image of EO/IR equipment on UAV(Unmanned Aerial Vehicle) moves to the unintended direction. This phenomenon should be improved for successful flight mission. Methods: To improve the drift phenomenon, the drift compensation method, the combination algorithm of FMC(Forward Motion Compensation) and AMC(Angular Motion Compensation) method, are introduced to calculate pitch and azimuth angle. Result values of pitch and azimuth angle are used for the improvement of image quality in EO/IR control logic. Results: The image quality is quantitatively improved more than 15 times through field test data of flight. Conclusion: Using the drift compensation technique, the image quality for EO/IR equipment is improved over 15 times than existing methods. This means the user of UAV with EO/IR device can perform a successful mission by keeping the line of sight for the target accurately.

Development of an Algorithm for Regulation of Inlet Blood Flow in Electrohydraulic Left Ventricular Assist Device Using Fuzzy Logic (퍼지로직을 이용한 전기유압식 좌심실 보조장치의 유입혈류량 조절 알고리즘의 개발)

  • Choi, Jae-Soon;Choi, Won-Woo;Jo, Yong-Ho;Park, Seong-Keun;Min, Byoung-Goo
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1995.10b
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    • pp.387-392
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    • 1995
  • 전기 유압식 좌심실 보조장치에서 모터 전류 파형을 정보로 하여 작동기의 이완기 속도를 조절함으로써 좌심방으로부터 유입되는 혈류량을 조절하는 알고리즘을 개발하였다. 좌심실 보조장치(Left Ventricular Assist Device, LVAD)는 허혈성 심장질환 등으로 좌심실 의 혈액 박출 기능이 저하된 환자에게 시술하여 정상 상태의 심박출량을 유지할 수 있도록 하는 보조 혈액 박출 기능이이다. 전기 유압식 좌심실 보조장치에서는 혈액의 유입이 능동 적으로 이루어지므로, 좌심방 함몰로 인한 심근 손상 및 외부 공기 유입으로 인한 색전증을 방지하기 위해 유입혈류량을 현재 좌심방내의 상태에 따라 적절히 조절해 주어야 한다. 좌 심방 내의 혈액량 정도는 혈액을 유입해 내는 작동기의 이완기 동작 시에 소모되는 에너지 크기에 반영되고, 작동기를 구동하는 모터에 들어가는 전류의 크기는 작동기에 공급되는 에 너지에 비례하므로, 이전류 파형의 정보들을 통해 좌심방내의 상태를 추정해 볼 수 있다. 본 논문에서는 퍼지로직을 적용하여 모터 전류 파형의 정보들을 통해 좌심방 내의 상태를 추정 해 볼 수 있다. 본 논문에서는 퍼지로직을 적용하여 모터 전류 파형의 이상 유무를 판단한 뒤 에에 따라 작동기의 이완기 속도를 조절하는 알고리즘을 개발하여 모의순환장치 실험을 통해 그 실효성을 검증한 결과를 정리하였다.

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A Study on the Process & Device Characteristics of BICMOS Gate Array (BICMOS게이트 어레이 구성에 쓰이는 소자의 제작 및 특성에 관한 연구)

  • 박치선
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.14 no.3
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    • pp.189-196
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    • 1989
  • In this paper, BICMOS gate array technology that has CMOS devices for logic applications and bipolar devices for driver applications is presented. An optimized poly gate p-well CMOS process is chosen to fabricate the BICMOS gate array system and the basic concepts to design these devices are to improve the characteristics of bipolar & CMOS device with simple process technology. As the results hFE value is 120(Ic=1mA) for transistor, and there is no short channel effects for CMOS devices which have Leff to 1.25um and 1.35um for n-channel, respectively, 0.8nx gate delay time of 41 stage ring oscillators is obtained.

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Development of Small-sized Ceramic VCXO using the PECL (PECL을 이용한 소형 세라믹 VCXO 개발)

  • Lee, Jae-Kyung;Yoon, Dal-Hwan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.2A
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    • pp.107-113
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    • 2005
  • In this paper, we have developed the miniature ceramic PECL(positive emitter-coupled logic) VCXO of the $5{\times}7mm$ size for gratifying the requested specifications and the multilayer ceramic SMD(surface mounted device) package technology. The ceramic SMD PECL VCXO designed by the inverted Mesa type HFF is operating at the 3.3 Voltage and have the frequency range of 120MHz-180MHz. The Q factor is over 5K and it has the low jitter characteristics of 3.5 ps and low phase noise.

The Development of High Resolution Film Scanner Using DSP (DSP를 이용한 고해상도 스캐너 개발)

  • 김태현;최은석;백중환
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2000.12a
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    • pp.149-152
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    • 2000
  • A scanner is an output device that scans documents, photographs, films etc, and convert them to digital data. Especially, a film scanner is used for scanning negative/positive films. In this paper, we design step motor control part, image sensor part, and Aか converter part which are components of the scanner and use DSP for fast signal processing. We also design the interface circuits using EPLD between these peripherals and DSP. The PC interface circuits between scanner and PC are designed by using parallel port to control and transfer the scanned data from scanner to PC. For 35mm film, we design hardwares which obtain high resolution more than 9 million pixels (horizontal resolution is 3835 and vertical resolution is 2592).

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Efficient FPGA Logic Design for Rotatory Vibration Data Acquisition (회전체 진동 데이터 획득을 위한 효율적인 FPGA 로직 설계)

  • Lee, Jung-Sik;Ryu, Deung-Ryeol
    • 전자공학회논문지 IE
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    • v.47 no.4
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    • pp.18-27
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    • 2010
  • This paper is designed the efficient Data Acquisition System for an vibration of rotatory machines. The Data Acquisition System is consist of the analog logic having signal filer and amplifier, and digital logic with ADC, DSP, FPGA and FIFO memory. The vibration signal of rotatory machines acquired from sensors is controlled by the FPGA device through the analog logic and is saved to FIFO memory being converted analog to digital signal. The digital signal process is performed by the DSP using the vibration data in FIFO memory. The vibration factor of the rotatory machinery analysis and diagnosis is defined the RMS, Peak to Peak, average, GAP, FFT of vibration data and digital filtering by DSP, and is need to follow as being happened the event of vibration and make an application to an warning system. It takes time to process the several analysis step of all vibration data and the event follow, also special event. It should be continuously performed the data acquisition and the process, however during processing the input signal the DSP can not be performed to the acquisited data after then, also it will be lose the data at several channel. Therefore it is that the system uses efficiently the DSP and FPGA devices for reducing the data lose, it design to process a part of the signal data to FPGA from DSP in order to minimize the process time, and a process to parallel process system, as a result of design system it propose to method of faster process and more efficient data acquisition system by using DSP and FPGA than signal DSP system.

Channel and Gate Workfunction-Engineered CNTFETs for Low-Power and High-Speed Logic and Memory Applications

  • Wang, Wei;Xu, Hongsong;Huang, Zhicheng;Zhang, Lu;Wang, Huan;Jiang, Sitao;Xu, Min;Gao, Jian
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.1
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    • pp.91-105
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    • 2016
  • Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green's functions (NEGF) solved self - consistently with Poisson's equations. It is revealed that hetero - material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ${\Phi}_{M1}/{\Phi}_{M2}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.

Novel Graphene Volatile Memory Using Hysteresis Controlled by Gate Bias

  • Lee, Dae-Yeong;Zang, Gang;Ra, Chang-Ho;Shen, Tian-Zi;Lee, Seung-Hwan;Lim, Yeong-Dae;Li, Hua-Min;Yoo, Won-Jong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.120-120
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    • 2011
  • Graphene is a carbon based material and it has great potential of being utilized in various fields such as electronics, optics, and mechanics. In order to develop graphene-based logic systems, graphene field-effect transistor (GFET) has been extensively explored. GFET requires supporting devices, such as volatile memory, to function in an embedded logic system. As far as we understand, graphene has not been studied for volatile memory application, although several graphene non-volatile memories (GNVMs) have been reported. However, we think that these GNVM are unable to serve the logic system properly due to the very slow program/read speed. In this study, a GVM based on the GFET structure and using an engineered graphene channel is proposed. By manipulating the deposition condition, charge traps are introduced to graphene channel, which store charges temporarily, so as to enable volatile data storage for GFET. The proposed GVM shows satisfying performance in fast program/erase (P/E) and read speed. Moreover, this GVM has good compatibility with GFET in device fabrication process. This GVM can be designed to be dynamic random access memory (DRAM) in serving the logic systems application. We demonstrated GVM with the structure of FET. By manipulating the graphene synthesis process, we could engineer the charge trap density of graphene layer. In the range that our measurement system can support, we achieved a high performance of GVM in refresh (>10 ${\mu}s$) and retention time (~100 s). Because of high speed, when compared with other graphene based memory devices, GVM proposed in this study can be a strong contender for future electrical system applications.

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A Light Incident Angle Stimulated Memristor Based on Electrochemical Process on the Surface of Metal Oxide

  • Park, Jin-Ju;Yong, Gi-Jung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.174-174
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    • 2014
  • Memristor devices are one of the most promising candidate approaches to next-generation memory technologies. Memristive switching phenomena usually rely on repeated electrical resistive switching between non-volatile resistance states in an active material under the application of an electrical stimulus, such as a voltage or current. Recent reports have explored the use of variety of external operating parameters, such as the modulation of an applied magnetic field, temperature, or illumination conditions to activate changes in the memristive switching behaviors. Among these possible choices of signal controlling factors of memristor, photon is particularly attractive because photonic signals are not only easier to reach directly over long distances than electrical signal, but they also efficiently manage the interactions between logic devices without any signal interference. Furthermore, due to the inherent wave characteristics of photons, the facile manipulation of the light ray enables incident light angle controlled memristive switching. So that, in the tautological sense, device orienting position with regard to a photon source determines the occurrence of memristive switching as well. To demonstrate this position controlled memory device functionality, we have fabricated a metal-semiconductor-metal memristive switching nanodevice using ZnO nanorods. Superhydrophobicity employed in this memristor gives rise to illumination direction selectivity as an extra controlling parameter which is important feature in emerging. When light irradiates from a point source in water to the surface treated device, refraction of light ray takes place at the water/air interface because of the optical density differences in two media (water/air). When incident light travels through a higher refractive index medium (water; n=1.33) to lower one (air; n=1), a total reflection occurs for incidence angles over the critical value. Thus, when we watch the submerged NW arrays at the view angles over the critical angle, a mirror-like surface is observed due to the presence of air pocket layer. From this processes, the reversible switching characteristics were verified by modulating the light incident angle between the resistor and memristor.

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