• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.5A
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• pp.341-346
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• 2009

M-WiMAX (Mobile-Worldwide Interoperability for Microwave Access) system, which uses OFDM (Orthogonal Frequency Division Multiplexing) technique, is known to be proper for mobile high-speed data transmission system. Nevertheless, M-WiMAX is seriously sensitive to IQ imbalance caused by the LO (Local Oscillator) at the receiver. In this paper, we analyze the effect of IQ imbalance on the system, and then propose a joint optimization scheme that can optimize DFE (Digital Front-end) of mobile modem by combining operation duplicated between AGC (Automatic Gain Control) and the estimation and compensation of IQ imbalance. Simulation results show that the proposed scheme achieves the same performance of the conventional scheme while reducing the complexity of the H/W implementation.

• Journal of Advanced Navigation Technology
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• v.2 no.1
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• pp.22-33
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• 1998

In the coherent-on-receiver radar system using the magnetron source, frequency synthesizer is employed as a STALO(Stable Local Oscillator) to keep the intermediate frequency stable. In this paper, X-band(8.4GHz~9.7GHz) single loop frequency synthesizer is designed and implemented by an indirect frequency synthesis technique. Phase comparison is performed by a digital PLL(Phase-Locked Loop) chip and the loop filter is designed for the low phase noise. The effects of loop component characteristics on the output phase noise are analyzed for single loop structures, and the calculated results are compared with the measured data.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.411-415
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• 2003

In this paper, a reflector type frequency doubler for local oscillator at 24GHz is designed and fabricated with ne71300-N MESFET. Optimum source and load impedances are decided through a multiharmonic load pull simulation technique. A conversion gain ran be improved using the reflector and fundamental and third harmonics are well suppressed with open stub of λ/4 length. Measured results show output power at 0dBm of input power is -3.776dBm, conversion gain 0.736dB, harmonic suppression 41.064dBc, respectively.

• Journal of the Korea Institute of Military Science and Technology
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• v.25 no.2
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• pp.144-150
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• 2022

The on-board processor of satellite synthetic aperture radar(SAR) generates transmission signal by digital signal processing, converts it into an analog signal. At this time, the transmission signal generated from the baseband requires the frequency modulation to convert it to the high-frequency band in order to improve the stability. General frequency modulation method using local oscillator(LO) causes IQ imbalance due to phase error/magnitude error and these error reduce performance of SAR. To generate transmission signal without phase/magnitude error, this paper suggests design method of the frequency modulation method using digital to analog converter(DAC) at on-board SAR. For design, this paper analyzes the characteristic of DAC mode and uses pre-compensation filter. To analyze the proposed method performance, performance index are compared with IQ imbalance signals. This method is suitable for on-board SAR using fast sampling DAC and has the advantage of being able to solve IQ imbalances.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.135-138
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• 2002

VCO(Voltage Controlled Oscillator) is one of the main components governing the size, performance and power consumption of telecommunication devices. As the devices become much smaller, VCO need to have much smaller size with better characteristics. Buried type passive components of L,C,R were developed previously and the structure of these components are good for minimizing the size of VCO. Our own library of passive components is used in simulation and fabrication of VCO circuit, and surface mounted components like varactor diode are analysed using the measurement circuit designed by ourselves. Two-Dimensional simulation of VCO circuit and local three-Dimensional structure simulation are performed and their relation is obtained. In structure of multi-layered VCO, some components governing the characteristics of VCO are selected and placed on the top of oscillator for the good tuning process. In resonator part, the stripline structure and low loss glass/ceramic material are used to get higher Q value. In our research, a VCO oscillates in the 2.3∼2.36 GHz band is developed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.2
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• pp.187-195
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• 1999

A series feedback DRO operating at 3.2 GHz applicable to the spectrum analyzer as the second local oscillator, is designed and fabricated. We can obtain a low noise by utilizing the small signal S-parameter of the transistor and adjusting the reflection coefficient from the coupling coefficient between dielectric resonator and microstrip line. The results show that output power is 10.50 dBm, a stable low phase noise is -116 dBc/Hz at a 10 kHz offset frequency and a harmonic characteristic is 19.33 dBc.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.1
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• pp.74-79
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• 2002

The EM(Engineering Model) VCO(Voltage Controlled Oscillator) is nonlinear designed for LO(Local Oscillator) of Ka-band satellite transponder. The microstripline coupled with dielectric resonator is implemented as a high impedance inverter to improve the phase noise, and the quality factor of resonant circuit can be transferred to active device with the enhanced loaded quality factor. The developed VCO has the oscillating tuning range of 9.7965~9.8032 GHz for the control voltage range of 0~12 V. This VCO requires the DC power of 8 V and 17 mA. The phase noise characteristics are -96.51 dBc/Hz @10 KHz and -116.5 dBc/Hz @100 KHz, respectively. And, the output power of 7.33 dBm is measured.

• Journal of the Korea Institute of Military Science and Technology
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• v.19 no.3
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• pp.379-386
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• 2016

In this paper, phase noise analysis result for 2.4 GHz PLL(phase locked loop) using SPD(sample phase detector) is proposed. It can be used for high performance frequency synthesizer's LO(local oscillator) to extend output frequency range or for LO of offset PLL to reduce a division rate or for clock signal of DDS(direct digital synthesizer). Before manufacturing, theoretical estimation of PLL's phase noise performance should be performed. In order to calculate phase noise of PLL using SPD, Leeson model is used for modeling phase noise of VCO(voltage controlled oscillator) and OCXO(ovened crystal oscillator). After theoretically analyzing phase noise of PLL, optimized loop filter bandwidth was determined. And then, phase noise of designed loop filter was calculated to find suitable OP-Amp. Also, the calculated result of phase noise was compared with the measured one. The measured phase noise of PLL was -130 dBc/Hz @ 10 kHz.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.485-487
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• 2006

This paper describes a frequency synthesizer designed in a $0.25{\mu}m$ CMOS technology for using local oscillators for the IF stages. The design is focused mainly on low-power characteristics. A simple ring-oscillator based VCO is used, where a single control signal can be used for variable resistors. The designed PLL includes all building blocks for elimination of external components, other than the crystal, and its operating frequency can be programmed by external data. It operates in the frequency range of 250MHz to 800MHz and consumes l.08mA at 500MHz from a 2.5V supply. The measured phase noise is -85dBc/Hz in-band and -105dBc/Hz at 1MHz offset. The die area is $1.09mm^2$

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.421-424
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• 2001

In this paper, We have designed and fabricated VCO in two way, the common source and common gate circuit for I local oscillator of 60 GHz wireless LAN system. The VCO employed a GaAs MESFET for negative resistance and a varactor diode for frequency tuning. The common gate VCO was measured the phase noise -112 dBc/Hz at the 1 MHz frequency offset. The output power and the second harmonic frequency suppression were 7.81 dBm and -29.3 dBc when tuning voltage was 3V, respectively. The total size of VCO was 28.6$\times$12.14 $\textrm{mm}^2$.