• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.11
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• pp.841-845
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• 2013

We give a textured front on silicon wafer for high-efficiency solar cells by using micro contact printing method which uses PDMS (polydimethylsiloxane) silicon rubber as a stamp and SAM (self assembled monolayer)s as an ink. A random pyramidal texturing have been widely used for a front-surface texturing in low cost manufacturing line although the cell with random pyramids on front surface shows relatively low efficiency than the cell with inverted pyramids patterned by normal optical lithography. In the past two decades, the micro contact printing has been intensively studied in nano technology field for high resolution patterns on silicon wafer. However, this promising printing technique has surprisingly never applied so far to silicon based solar cell industry despite their simplicity of process and attractive aspects in terms of cost competitiveness. We employ a MHA (16-mercaptohexadecanoic acid) as an ink for Au deposited $SiO_2/Si$ substrate. The $SiO_2$ pattern which is same as the pattern printed by SAM ink on Au surface and later acts as a hard resist for anisotropic silicon etching was made by HF solution, and then inverted pyramidal pattern is formed after anisotropic wet etching. We compare three textured surface with different morphology (random texture, random pyramids and inverted pyramids) and then different geometry of inverted pyramid arrays in terms of reflectivity.

• Journal of the Korean Magnetics Society
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• v.9 no.6
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• pp.301-305
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• 1999

NiFe(60$\AA$)/Co(5$\AA$)/Cu(60$\AA$)/Co(30$\AA$) spin valve thin films were patterned into magnetoresistive random access memory (MRAM) cells by a conventional optical lithography process and their output and switching properties were characterized with respect to the cell size and geometry. When 1 mA of constant sense current was applied to the cells, a few or a few tens of mV of output voltage was measured within about 30 Oe of external magnetic field, which is an adequate output property for the commercializing of competitive MRAM devices. In order to resolve the problem of increase in the switching thresholds of magnetic layers with the downsizing of MRAM cells, a new approach using the controlled shape anisotropy was suggested and interpreted by a simple calculation of anisotropy energies of magnetic layers consisting of the cells. This concept gave a reduced switching threshold in NiFe(60$\AA$)/Co(5$\AA$) layer consisting of the patterned cells from about 15 Oe to 5 Oe and it was thought that this concept would be much helpful for the realization of competitive MRAM devices.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.255-255
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• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.1
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• pp.72-77
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• 2019

The display that provides information to us through the visual sense is a very important information transmission means by intuitively transmitting information, and the liquid crystal display (LCD) is the most widely used information transmission display. In this paper, we studied solvent assisted micromolding as an alternative for the rubbing that is essential to align the liquid crystals in LCD and successfully aligned the liquid crystal molecules by constructing the nanostructures on conventional polyimide alignment layer. When generating the nanostructures on the polyimide film, there was a competitive correlation between the dissolution effect of the polymer by the solvent and the capillary effect of the polyimide molecules into the nanostructures of the mold depending on the process temperature. It was possible to form nanostructures with high step by deriving the optimum temperature. These nanostructures were able to align the liquid crystal molecules uniformly and demonstrated that they could form a desirable pretilt angle.

• Proceedings of the Korea Information Processing Society Conference
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• 2021.05a
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• pp.505-508
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• 2021

반도체 회로의 미세화로 단위 공정이 증가하면 TAT(turn-around time) 증가에 따른 제조 비용이 늘어난다. 반도체 공정 중 포토 공정은 마스크의 회로를 웨이퍼에 전사하는 공정으로 전사를 담당하는 노광장비의 성능에 의해 회로의 정확성이 결정된다. 이런 정확성을 검증하는 계측공정은 회로의 미세화가 진행될수록 필요성은 증가하나 TAT 증가의 주된 요인으로 최근 기계학습을 사용한 다양한 예측 모형들의 개발로 계측 결과를 예측하는 실험들이 진행되고 있다. 본 논문은 노광장비 센서들의 이상값을 감지하여 분류 후 계측공정을 진행하는 LFDC(Lithography Fault Detection and Classification) 시스템의 문제인 분류 성능이 떨어지는 것을 해결하기 위해 XGBoost를 사용하여 계측공정을 진행하지 않고 노광장비 센서의 이상값을 학습된 학습기를 통해 분류하여 포토 공정을 재진행하거나 다음 공정을 진행하는 방법을 실험하였다. 실험에서 사용된 계측 결과 예측 모형은 89%의 정확도를 확보하였고 반도체 데이터 특성인 심각한 불균형의 데이터에 대해서도 같은 정확도를 얻었다. 이런 결과는 노광장비 센서들의 이상값에 대해 89%는 정상으로 판단하였고 정상으로 판단한 웨이퍼를 실제 계측 시 예측과 같은 결과를 얻었다. 계측 결과 예측 모형을 사용하면 실제 계측을 진행하지 않고 노광장비 센서들의 이상값에 대한 판정을 할 수 있어 TAT 단축으로 제조 비용감소, 계측 장비 부하 감소 및 효율 향상을 할 수 있다. 하지만 본 논문에서는 90%의 성능을 보이는 계측 결과 예측 모형으로 여전히 10%에 대해서는 실제 계측이 필요한 문제에 대해 추후 더 연구가 필요하다.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.2
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• pp.13-20
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• 2023

The process of microelectromechanical system (MEMS) fabrication involves surface treatment to impart functionality to the device. Such surface treatment method is the self-assembled monolayer (SAM) technique, which modifies and functionalizes the surface of MEMS components with organic molecule monolayer, possessing a precisely controllable strength that depends on immersion time and solution concentration. These monolayers spontaneously adsorb on polymeric substrates or metal/ceramic components offering high precision at the nanoscale and modifying surface properties. SAM technology has been utilized in various fields, such as tribological property control, mass-production lithography, and ultrasensitive organic/biomolecular sensor applications. This paper provides an overview of the development and application of SAM technology in various fields.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.362-362
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• 2010

Today, vast attention has been paid to periodic arrays of nanostructures due to their potential for applications such as memory with huge storage density. Such application requires large-scale fabrication of well ordered nano-sized structures. One of the most widely used methods for the ordered nanostructures is lithography. This top-down process, however, has the limit to reduce size. Here the promising alternative is the self-organization of ordered nano-sized structures such as large scale 2d carbon-induced reconstructions on W(110). In the present study, we report on the first well-resolved atomic resolution STM studies of the well-known R($15{\times}3$) and R($15{\times}12$) carbon induced reconstruction of the W(110). From the atomic image of R($15{\times}3$) for different values of tunneling gap resistance, we can tell there are no missing atoms in unit cells of R($15{\times}3$) and some atomic displacements are substantial from the clean W(110), even though not all the imaged position of atoms correspond to tungsten, but may include those of carbon. We are considering two cases; First case is related to lattice deformation, or top layer of W(110) is deformed in the process of relief of strain caused by random inserting of carbon atoms possibly in the interstitial position. In the second case, R($15{\times}3$) unit cell results from a coincidence lattice between clean W(110) substrate and tungsten carbide overlayer which has rectangular atomic arrangement and giving R($15{\times}3$) coincidence lattice. beta-W2C showing rectangular unit cell should be a candidate. Further, we report on new reconstructions. Unlike the well-known R($15{\times}12$) consisting of two parts, two inner structures between two "Backbone" structures. The new reconstruction, which we found for the first time, contains more parts between the "Backbone"s. Sometimes we can observe the reconstruction consists of only inner parts without "Backbone" parts. Thus, the observed reconstruction can be built by constructing of two types of "Lego"-like block. Moreover, the rectangle shape of "Backbone" transform to parallelogram-like shape over time, the so-called wavy-R($15{\times}12$). Adsorption of hydrogen can be the reason for this transformation.

• Journal of the Korean Academy of Esthetic Dentistry
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• v.27 no.2
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• pp.82-96
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• 2018

3D printing is a process of producing 3d object from a digital file in STL format by joining, bonding, sintering or polymerizing small volume elements by layer. The various type of 3d printing is classified according to the additive manufacturing strategies. Among the types of 3D printer, SLA(StereoLithography Apparatus) and DLP(Digital Light Processing) 3D printer which use polymerization by light source are widely used in dental office. In the previous study, a full-arch scale 3d printed model is less precise than a conventional stone model. However, in scale of quadrant arch, a 3d printed model is significantly precise than a five-axis milled model. Using $3^{rd}$ Party dental CAD program, full denture, provisional crowns and diagnostic wax-up model are fabricated by 3d printer in dental office. In Orthodontics, based on virtual setup model, indirect bracket bonding tray can be generated by 3d printer. And thermoforming clear aligner can be fabricated on the 3d printed model. 3D printed individual drilling guide enable the clinician to place the dental implant on the proper position. The development of layer additive technology enhance the quality of 3d printing object and shorten the operating time of 3D printing. In the near future, traditional dental laboratory process such as casting, denture curing will be replaced by digital 3D printing.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.3 s.32
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• pp.37-45
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• 2004

Electroless Ni(P) has been widely used for under bump metallization (UBM) of flip chip and surface finish layer in microelectronic packaging because of its excellent solderability, corrosion resistance, uniformity, selective deposition without photo-lithography, and also good diffusion barrier. However, the brittle fracture at solder joints and the spatting of intermetallic compound (IMC) associated with electroless Ni(P) are critical issues for its successful applications. In the present study, the mechanism of IMC spatting and microstructure change of the Ni(P) film were investigated with varying P content in the Ni(P) film (4.6,9, and $13 wt.\%$P). A reaction between Sn penetrated through the channels among $Ni_3Sn_4$ IMCs and the P-rich layer ($Ni_3P$) of the Ni(P) film formed a $Ni_3SnP$ layer. Thickening of the $Ni_3SnP$ layer led to $Ni_3Sn_4$ spatting. After $Ni_3Sn_4$ spatting, the Ni(P) film directly contacted the molten solder and the $Ni_3P$ phase further transformed into a $Ni_2P$ phase. During the crystallization process, some cracks formed in the Ni(P) film to release tensile stress accumulated from volume shrinkage of the film.

• Journal of the Korean Vacuum Society
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• v.20 no.5
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• pp.339-344
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• 2011

The Ohmic contact of Ti/Au metals on n-type ZnO thin film deposited on c-plane sapphire substrates by pulsed laser deposition was investigated by TLM (transfer length method) patterns. The Ti/Au metal films with thickness of 35 nm and 90 nm were deposited by electron-beam evaporator and thermal evaporator, respectively. By using the photo-lithography method, the $100{\times}100{\mu}m^2$ TLM patterns with $6{\sim}61{\mu}m$ gaps were formed. To improve the electrical properties as well as to decrease an interface states and stress between metal and semiconductor, the post-annelaing process was done in oxygen ambient by rapid thermal annealing system at temperature of $100{\sim}500^{\circ}C$ for 1 min. In this study, it appeared that the minimum specific contact resistivity shows about $1.1{\times}10^{-4}{\Omega}{\cdot}cm^2$ in $300^{\circ}C$ annealed sample, which may be originated from formation of oxygen vacancies of ZnO during an oxidation of Ti metal at the interface of Ohmic contacts.