• 한국진공학회지
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• 제13권1호
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• pp.39-45
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• 2004

UV-나노임프린팅 (Ultraviolet-Nanoimprinting Lithography:UV-NIL) 공정 기술은 수십 나노에서 수 나노미터 크기의 구조물을 적은 비용으로 대량생산 할 수 있다는 장점을 가지고 있는 기술로 최근 전세계적으로 연구가 활발히 진행되고 있다. 본 연구에서는 반도체 공정 중 마스크 제작 공정을 이용하여 나노패턴을 가진 5${\times}$5${\times}$0.09 인치 크기의 수정스탬프(quartz stamp)를 제작하였고, 임프린팅 (imprinting)시에 레지스트(resist)와 스탬프(stamp) 사이에서 발생하는 점착현상(adhesion)을 방지하고자 그 표면에 Fluoroalkanesilane(FAS) 표면처리를 하였다. 웨이퍼의 평탄도를 개선하고 친수(hydrophilic) 상태의 표면을 만들기 위해 그 표면에 평탄화층을 스핀코팅하였고, 1 nl의 분해능을 가진 디스펜서(dispenser)를 이용하여 레지스트 액적을 도포하였다. 스템프 상의 패턴과 레지스트에 임프린트된 패턴은 SEM, AFM 등을 이용하여 측정하였으며, EVG620-NIL 장비를 이용한 임프린팅 실험에서 370 nm - 1 um 크기의 다양한 패턴을 가진 스탬프의 패턴들이 정확하게 레지스트에 전사됨을 확인하였다.

• 한국산학기술학회논문지
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• 제12권2호
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• pp.829-834
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• 2011

고 집적 회로의 제작에 있어서 노광 공정은 가장 중요한 기술로 주로 마스크 방식의 노광 방법을 사용하지만 다품종 소량 생산 및 주기적인 제품 변화에 있어서 효율적이지 못하기 때문에 마스크리스 리소그래피 기술이 노광공정에서 각광받고 있다. 본 연구에서는 DMD를 이용한 마스크리스 리소그래피에 있어 다중 레이저 빔의 에너지와 중첩도와의 연관성을 시뮬레이션을 통해 분석하였다. 시뮬레이션을 통해 최적의 스캔 라인 간격을 제시하였고, LDI 시스템을 이용한 노광 실험을 통해 미세 페턴의 정밀도를 향상시킬 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.259-259
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• 2008

The LTCC (Low Temperature Co-fired Ceramic) technology meets the requirements for high quality microelectronic devices and microsystems application due to a very good electrical and mechanical properties, high reliability and stability as well as possibility of making integrated three dimensional microstructures. The wet process, which has been applied to the etching of the metallic thin film on the ceramic substrate, has multi process steps such as lithography and development and uses very toxic chemicals arising the environmental problems. The other side, Plasma technology like ion beam sputtering is clean process including surface cleaning and treatment, sputtering and etching of semiconductor devices, and environmental cleanup. In this study, metallic multilayer pattern was fabricated by the ion beam etching of Ti/Pd/Cu without the lithography. In the experiment, Alumina and LTCC were used as the substrate and Ti/Pd/Cu metallic multilayer was deposited by the DC-magnetron sputtering system. After the formation of Cu/Ni/Au multilayer pattern made by the photolithography and electroplating process, the Ti/Pd/Cu multilayer was dry-etched by using the low energy-high current ion-beam etching process. Because the electroplated Au layer was the masking barrier of the etching of Ti/Pd/Cu multilayer, the additional lithography was not necessary for the etching process. Xenon ion beam which having the high sputtering yield was irradiated and was used with various ion energy and current. The metallic pattern after the etching was optically examined and analyzed. The rate and phenomenon of the etching on each metallic layer were investigated with the diverse process condition such as ion-beam acceleration energy, current density, and etching time.

• 한국산학기술학회:학술대회논문집
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• 한국산학기술학회 2002년도 추계학술발표논문집
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• pp.201-204
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• 2002

Overlay margin 확보를 위한 oversizing과, design rule checking, jog filtering를 통하여 side-lobe를 추출하였다. 이렇게 추출한 side-lobe를 extent하고, Cr pattern을 정의하여 side-lobe 현상을 해결할 수 있었다. 하지만 이 방법은 mask제조 공정이 복잡하므로 Cr shield방식의 단점인 복잡한 mask제작공정과 구조를 단순화하기 위하여 scattering bar를 이용하였다. 따라서, scattering bar를 삽입하기 위한 rule을 생성하여 metal layer에 적용하고 aerial image simulation을 통해 side-lobe 현상이 억제되었음을 확인하였다. 그리고 앞에서와는 반대로 background clear의 경우에 발생하는 side-lobe에 scattering bar를 적용하여 억제됨을 확인하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.53-56
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• 2002

We have developed a Monte Carlo (MC) simulator for electron beam lithography in multi-layer resists and multi-layer substrates in order to fabricate and develop high-speed PHEMT devices for millimeter- wave applications. For the deposited energy calculation to multi-layer resists by electron beam in MC simulation, we modeled newly for multi-layer resists and heterogeneous multi-layer substrates. Using this model, we simulated T-gate or r-gate fabrication process in PHEMT device and showed our results with SEM observations.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2006년도 추계학술대회 논문집
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• pp.665-666
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• 2006

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.788-790
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• 2003

Closed-cell type barrier ribs of PDP were formed by capillary molding process using molds prepared by inclined UV lithography process. Various types of molds with different inclined angles were prepared by patterning SU-8 thick photoresist film and casting with PDMS. The ribs with various type cells were successfully formed by the process. The effects of inclined angle on the distortion of barrier ribs during sintering were investigated. The results indicated that the barrier ribs with a draft angle and dimensional change does not affect the distortion of the barrier ribs during sintering, suggesting that the closed-cell must be isotropic in sintering shrinkage.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2003년도 춘계학술대회
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• pp.1043-1047
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• 2003

With the advancement of micro-systems and nanotechnology, the need for ultra-precision fabrication techniques has been steadily increasing. In this paper, a novel nano-structure fabrication process that is based on the fundamental understanding of nano-scale tribological interaction is introduced. The process, which is called Mechano-Chemical Scanning Probe Lithography (MC-SPL), has two steps, namely, mechanical scribing for the removal of a resist layer and selective chemical etching on the scribed regions. Organic monolayers are used as a resist material, since it is essential for the resist to be as thin as possible in order to fabricate more precise patterns and surface structures. The results show that high resolution patterns with sub-micrometer scale width can be fabricated on both silicon and various metal surfaces by using this technique.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2003년도 춘계학술대회
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• pp.1065-1068
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• 2003

The nano imprint process is one of the next generation lithography has been mentioned as one of major nanoreplication techniques because it is simple process, low cost, high replication fidelity and relatively high throughput. This process requires a surface contact between a template with patterns and a wafer on a stage. After contact, the vertical moving the template to the wafer causes some directional motions of the stage. Thus the stage must move according to the motions of the template to avoid the damage of the transferred patterns on the wafer. This study is to develop the wafer stage with a passive compliance to overcome the damage. This stage is designed with the concept like that it has a monolithic, symmetry and planar 6-DOF mechanism.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2004년도 춘계학술대회 발표 논문집
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• pp.159-162
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• 2004

Problems of overlap errors and sidelobe printing by the design rule reduction in the lithography process using attenuated phase-shifting masks(attPSM) have been serious. Overlap errors and sidelobes can be simultaneously solved by the rule-based correction using scattering bars with the rules extracted from test patterns. Process parameters affecting the attPSM lithography simulation have been determined by the fitting method to the process data. Overlap errors have been solved applying the correction rules to the metal patterns overlapped with contact/via. Moreover, the optimal insertion rule of the scattering bars has made it possible to suppress the sidelobes and to get additional pattern fidelity at the same time.