• 전자공학회논문지A
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• 제28A권5호
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• pp.398-406
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• 1991

This paper presents a graphics accelerator for fast image generation. The accelarator has three major functional blocks: linear interpolator, multipliers and Edgee Painting Tree. Linear interpolator with coupled binary tree structure interpolates functional values of two end points. Two multipliers compute input values of interpolator in parallel. Mask pattern which removes out invalid data is generated by Edge Painting Tree. The proposed architecture in this paper is responsible for 64 pixels and can process about 5,900 10x10polygons per second.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.522-522
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• 2007

We observed new physical phenomia. The dispersion relation and the distributions of RF electric field in the corrugated wall waveguide are analyzed numerically. The measurement of the dispersion relation are obsered by a plunger method employed in the slow wave structure for linear accelerators.