• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1246-1249
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• 1994

Thin amorphous film of $a-Se_{75}Ge_{25}$ acts as a positive resist in ion beam lithography. Previously, we reported the optical characteristics of amorphous $Se_{75}Ge_{25}$ thin film by the low-energy ion beam exposure and presented analytically calculated values such as ion range, ion concentration and ion transmission coefficient, etc. As the calculated results of analytical calculation, the energy loss per unit distance by $Ga^+$ ion is about $10^3[keV/{\mu}m]$ and nearly constant for all energy range. Especially, the projected range and struggling for 80 [KeV] $Ga^+$ ion energy are 0.0425[${\mu}m$] and 0.020[${\mu}m$], respectively. Hear, we present the results of Monte-Carlo computer simulation of Ga ion scattering, exposure and development in $a-Se_{75}Ge_{25}$ resist film for focused ion beam(FIB) lithography. Monte-Carlo method is based on the simulation of individual particles through their successive collisions with resist atoms. By the summation of the scattering events occurring in a large number N(N>10000) of simulated trajectories within the resist, the distribution for the range parameters is obtained. Also, the deposited energy density and the development pattern by a Gaussian or a rectangular ion beam exposure can be obtained.

• Carbon letters
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• v.24
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• pp.55-61
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• 2017

Carbon micropatterns (CMs) were fabricated from a negative-type SU-8 photoresist by proton ion beam lithography and pyrolysis. Well-defined negative-type SU-8 micropatterns were formed by proton ion beam lithography at the optimized fluence of $1{\times}10^{15}ions\;cm^{-2}$ and then pyrolyzed to form CMs. The crosslinked network structures formed by proton irradiation were converted to pseudo-graphitic structures by pyrolysis. The fabricated CMs showed a good electrical conductivity of $1.58{\times}10^2S\;cm^{-1}$ and a very low surface roughness.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1993.11a
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• pp.134-136
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• 1993

Microelectronic fabrication technology .is based on the use of lithsgraphy to create small linewidths and patterns that make up ULSI. In previous papers, we discussed the theoretically calculated values such as ion range, ion concentration,ion transmission coefficient and the defocused ion beam-induced characteristics in a-Se$_{75}$Ge$_{25}$. In this paper, the typical Monte Carlo (MC) simulation results and p개cedures for the focused ion beam lithography were presented. The interaction and scattering of ions with the resist depend on the beam energy, impact parameter arid resist parameters. For ion exposure simulations, the quantity of interest is the spatial distribution of energy deposited by ions in the resist due to interaction phenomena with resist ions.s.s.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.259-259
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• 2008

The LTCC (Low Temperature Co-fired Ceramic) technology meets the requirements for high quality microelectronic devices and microsystems application due to a very good electrical and mechanical properties, high reliability and stability as well as possibility of making integrated three dimensional microstructures. The wet process, which has been applied to the etching of the metallic thin film on the ceramic substrate, has multi process steps such as lithography and development and uses very toxic chemicals arising the environmental problems. The other side, Plasma technology like ion beam sputtering is clean process including surface cleaning and treatment, sputtering and etching of semiconductor devices, and environmental cleanup. In this study, metallic multilayer pattern was fabricated by the ion beam etching of Ti/Pd/Cu without the lithography. In the experiment, Alumina and LTCC were used as the substrate and Ti/Pd/Cu metallic multilayer was deposited by the DC-magnetron sputtering system. After the formation of Cu/Ni/Au multilayer pattern made by the photolithography and electroplating process, the Ti/Pd/Cu multilayer was dry-etched by using the low energy-high current ion-beam etching process. Because the electroplated Au layer was the masking barrier of the etching of Ti/Pd/Cu multilayer, the additional lithography was not necessary for the etching process. Xenon ion beam which having the high sputtering yield was irradiated and was used with various ion energy and current. The metallic pattern after the etching was optically examined and analyzed. The rate and phenomenon of the etching on each metallic layer were investigated with the diverse process condition such as ion-beam acceleration energy, current density, and etching time.

• 한국초전도학회:학술대회논문집
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• v.9
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• pp.91-94
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• 1999

A new type of high-T$_c$ superconducting Josephson junctions has been prepared by Ar ion beam etching and electron beam lithography. YBa$_2Cu_3O_{7-x}$ (YBCO) films deposited on (001) SrTiO$_3$ single crystal substrate by pulsed laser deposition were patterned by Ar ion milling with photolithography. The narrow slit with a electroresist mask, about 1000 ${\AA}$ wide, was constructed over a 3 ${\sim}$ 5 ${\mu}$m bridge of a 1200-${\AA}$-thick YBCO film by electron beam lithography. The slit was then etched by the Ar ion beam to form a damaged 600-${\AA}$-thick YBCO. Thus prepared structure forms an S-N-S (YBCO - damaged YBCO - YBCO) type Josephson junctions. Those junctions exhibit RSI-like I-V characteristics at 77 K. The properties of the Josephson junctions such as I$_c$ R$_N$, and J$_c$ were characterized.

• Journal of the Semiconductor & Display Technology
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• v.3 no.2
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• pp.5-9
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• 2004

Microcircuit fabrication requires precise control of impurities in tiny regions of the silicon. These regions must be interconnected to create components and VLSI circuits. The patterns to define such regions are created by lithographic processes. In order to image features smaller than 70 nm, it is necessary to employ non-optical technology (or next generation lithography: NGL). One such NGL is extreme ultra-violet lithography (EUVL). EUVL transmits the pattern on the wafer surface after reflecting ultra-violet through mask pattern. If particles exist on the blank mask, it can't transmit the accurate pattern on the wafer and decrease the reflectivity. It is important to care the blank mask. We removed the particles on the wafer using focused ion beam (FIB). During removal, FIB beam caused damage the multi layer mask and it decreased the reflectivity. The relationship between particle removal and reflectivity is examined: i) transmission electron microscope (TEM) observation after particle removal, ii) reflectivity simulation. It is found that the image mode of FIB is more effective for particle removal than spot and bar mode.

• Journal of the Korean Society for Precision Engineering
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• v.28 no.2
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• pp.245-250
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• 2011

A high-resolution shadow mask, a nanostencil, is widely used for high resolution lithography. This high-resolution shadowmask is often fabricated by a combination of MEMS processes and focused ion beam (FIB) milling. In this study, FIB milling on 500-nm-thin SiN membrane was tested and characterized. 500 nm thick and $2{\times}2$ mm large membranes were made on a silicon wafer by micro-fabrication processes of LPCVD, photolithography, ICP etching and bulk silicon etching. A subsequent FIB milling enabled local membrane thinning and aperture making into the thinned silicon nitride membrane. Due to the high resolution of the FIB milling process, nanoscale apertures down to 60 nm could be made into the membrane. The nanostencil could be used for nanoscale patterning by local deposition through the apertures.

• Electrical & Electronic Materials
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• v.7 no.5
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• pp.389-396
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• 1994

The bilayer film of Ag/a-S $e_{75.G}$ $e_{25}$ and the monolayer film of a-S $e_{75.G}$ $e_{25}$ act as a negative-type and a positive-type resist in focused ion beam lithography, respectively. Using a model which takes into account the ion stopping power, the ion projected range, the ion concentration implanted into resists and the ion transmission coefficient, etc., the ion resist parameters are calculated for a broad range of ion energies and implanted doses. Ion sources of A $r^{+}$, S $i^{++}$ and G $a^{+}$ are used to expose resists. As the calculated results, the energy loss per unit distance by Ga'$^{+}$ ion is about 10$^{3}$[keV/.mu.M] and nearly constant for all energy range. Especially, the projected range and struggling for 80[keV] G $a^{+}$ ion energy are 0.0425[.mu.m] and 0.020[.mu.m], , respectively and the resist thickness of a-S $e_{75}$ G $e_{25}$ to minimize the ion penetration rate into a substrate is 0.118[.mu.m].u.m]..u.m].

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.189-189
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• 2015

Plasmonics, sensor, field effect transistors, solar cells 등 다양한 적용분야를 가지는 실리콘 구조체는 제작공정에 의해 전기적 및 광학적 특성이 달라지기 때문에 적합한 나노구조 제작방법이 요구되고 있다. 나노구조체 제작방법으로는 Photo lithography, Extreme ultraviolet lithography (EUV), Nano imprinting lithography (NIL), Block copolymer (BCP) 방식의 방법들이 연구되고 있으며, 특히 BCP는 direct self-assembly 특성을 가지고 있으며 가격적인 면에서도 큰 장점을 가진다. 하지만 BCP를 mask로 사용하여 식각공정을 진행할 경우 BCP가 버티지 못하고 변형되어 mask로서의 역할을 하지 못한다. 이러한 문제를 해결하기 위하여 본 논문에서는 BCP와 질화막을 이용한 double mask 방법을 사용하였다. 기판 위에 BCP를 self-assembly 시키고 mask로 사용하여 hole 부분으로 노출된 기판을 Ion gun을 통해 질화 시킨 후에 BCP를 제거한다. 기판 위에 hole 모양의 질화막 표면은 BCP와 다르게 etching 공정 중 변형되지 않는다. 이러한 질화막 표면을 mask로 사용하여 pillar pattern의 실리콘 나노구조체를 제작하였다. 질화막 mask로 사용되는 template은 PS와 PMMA로 구성된 BCP를 사용하였다. 140kg/mol의 polystyrene과 65kg/mol의 PMMA를 톨루엔으로 용해시키고 실리콘 표면 위에 spin coating으로 도포하였다. Spin coat 후 230도에서 40시간 동안 열처리를 진행하여 40nm의 직경을 가진 PS-b-PMMA self-assembled hole morphology를 형성하였다. 질화막 형성 및 etching을 위한 장비로 low-energy Ion beam system을 사용하였다. Reactive Ion beam은 ICP와 3-grid system으로 구성된 Ion gun으로부터 형성된다. Ion gun에 13.56 MHz의 frequency를 갖는 200W 전력을 인가하였다. Plasma로부터 나오는 Ion은 $2{\Phi}$의 직경의 hole을 가지는 3-grid hole로 추출된다. 10~70 voltage 범위의 전위를 plasma source 바로 아래의 1st gird에 인가하고, 플럭스 조절을 위해 -150V의 전위를 2nd grid에 인가한다. 그리고 3rd grid는 접지를 시켰다. chamber내의 질화 및 식각가스 공급은 2mTorr로 유지시켰다. 그리고 기판의 온도는 냉각칠러를 이용하여 -20도로 냉각을 진행하였다. 이와 같은 공정 결과로 100 nm 이상의 높이를 갖는 40 nm직경의 균일한 Silicon pillar pattern을 형성 할 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.218.2-218.2
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• 2014

그래핀은 높은 전기 전도도와 열전도도, 기계적 강도를 가지고 있고 동시에 높은 전자이동도($200,000cm^2{\cdot}V{\cdot}^1{\cdot}s{\cdot}^1$) 특성을 갖는 물질로써 차세대 소재로 각광받고 있다. 하지만 그래핀을 소자에 응용하기 위해서는 전사공정과 lithography 공정 과정에서 발생되는 PMMA(Poly methyl methacrylate) residue를 완벽하게 제거해야 하는 문제점이 있다. 특히, lithography 공정 중 완벽하게 PMMA residue 가 제거되지 않고 잔류해 있을 경우에 소자의 life time, performance에 악영향을 준다는 보고가 있다. 이와같은 문제를 해결하기 위해 화학적 cleaning, 열처리를 통한 cleaning, 전류 인가에 의한 cleaning과 같은 방법들을 이용하여 그래핀의 PMMA residue를 제거하는 공정들이 보고되고 있지만, 화학적 cleaning 방법의 경우 chloroform 이라는 독성물질 사용으로 인해 산업적으로 응용이 어렵고, 열처리 방법은 전극 등의 금속이 $200^{\circ}C$ 이상의 높은 온도에서 장시간 노출될 경우 쉽게 손상을 입으며, 전류 인가에 의한 cleaning 방법은 국부적으로만 효과를 볼 수 있기 때문에 lithography 공정 후 PMMA residue를 효과적으로 제거하기에는 한계를 보이고 있다. 본 연구에서는 Ar을 이용하는 Ion beam 시스템을 통해 beam energy를 제어함으로써 PMMA residue를 효과적으로 제거하는 연구를 진행하였다. 최적화된 플라즈마 발생 조건을 찾기 위해 QMS(Quadrupole Mass Spectrometer)를 이용하여 입사하는 ion energy와 flux 양을 컨트롤 하였고, 250 W에서 최적화된 ion energy distribution 영역이 존재한다는 것을 확인할 수 있었다. 또한, 25 Gauss 정도의 electro-magnetic field를 이용하여 Ar의 ion energy를 10 eV 이하로 낮추어 damage를 최소화함으로써 효과적으로 그래핀을 cleaning 할 수 있었다. Cleaning과정에서 ion bombardment에 의해 발생한 damage는 $250^{\circ}C$에서 6시간 동안 annealing 공정을 거치면서 회복되는 것을 Raman spectroscopy의 D peak ($1335cm{\cdot}^1$) / G peak ($1572cm{\cdot}^1$) ratio 로 확인할 수 있었고, PMMA residue의 cleaning 여부는 G peak ($1580cm{\cdot}^1$)의 blue shift와 2D peak ($2670cm{\cdot}^1$)의 red shift를 통해 확인하였다. 그리고 AFM (Atomic Force Microscopy)을 이용하여 cleaning 공정과정에서 RMS roughness가 4.99 nm에서 2.01 nm로 감소하는 것을 관찰하였다. 마지막으로, PMMA residue의 cleaning 정도를 정량적으로 분석하기 위해 XPS (X-ray Photoelectron Spectroscopy)를 이용하여 sp2 C-C bonding이 74.96%에서 87.66%로 증가함을 확인을 할 수 있었다.