• Title/Summary/Keyword: inverter topology

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A Study on an Effective Drive of High Intensity Discharge(HID) Lamp Ballast for Cars (자동차 고광도 방전 램프용 안정기의 효과적 드라이브에 관한 연구)

  • Jeong, Gang-Youl
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.4
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    • pp.231-237
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    • 2006
  • This paper proposes an effective drive of high intensity discharge (HID) lamp ballast for cars. All control functions of the proposed ballast are implemented using a low-cost single chip microcontroller, PIC16C73 to optimize the total system size and to minimize cost through minimization of total component number. The proposed ballast generates high open-circuit voltage to ignite the lamp and is controlled to supply effectively the power required to shorten warm-up period after the breakdown. The DC-DC converter of the DC-AC converter part of the ballast utilizes the flyback converter topology that can minimize component number. Also, because to more minimize the ballast size, the transformer size must be minimized, for this, PWM (Pulse Width Modulation) pulses are generated with high frequency using the PWM module of the microcontroller. An analysis for this is explained, briefly. As if the operation of the lamp and ballast arrives at steady-state, then the ballast must AC-control the lamp, for this, the microcontroller utilizes the other PWM module. And the part related to the igniter is explained, briefly. It is shown through experimental results that the controller of the proposed ballast has good performance for the HID lamp for cars.

Pulse-Mode Dynamic Ron Measurement of Large-Scale High-Power AlGaN/GaN HFET

  • Kim, Minki;Park, Youngrak;Park, Junbo;Jung, Dong Yun;Jun, Chi-Hoon;Ko, Sang Choon
    • ETRI Journal
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    • v.39 no.2
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    • pp.292-299
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    • 2017
  • We propose pulse-mode dynamic $R_on$ measurement as a method for analyzing the effect of stress on large-scale high-power AlGaN/GaN HFETs. The measurements were carried out under the soft-switching condition (zero-voltage switching) and aimed to minimize the self-heating problem that exists with the conventional hard-switching measurement. The dynamic $R_on$ of the fabricated AlGaN/GaN MIS-HFETs was measured under different stabilization time conditions. To do so, the drain-gate bias is set to zero after applying the off-state stress. As the stabilization time increased from $ 0.1{\mu}s$ to 100 ms, the dynamic $R_on$ decreased from $160\Omega$ to $2\Omega$. This method will be useful in developing high-performance GaN power FETs suitable for use in high-efficiency converter/inverter topology design.

Low Cost and High Performance UPQC with Four-Switch Three-Phase Inverters

  • Trinh, Quoc-Nam;Lee, Hong-Hee
    • Journal of Electrical Engineering and Technology
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    • v.10 no.3
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    • pp.1015-1024
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    • 2015
  • This paper introduces a low cost, high efficiency, high performance three-phase unified power quality conditioner (UPQC) by using four-switch three-phase inverters (FSTPIs) and an extra capacitor in the shunt active power filter (APF) side of the UPQC. In the proposed UPQC, both shunt and series APFs are developed by using FSTPIs so that the number of switching devices is reduced from twelve to eight devices. In addition, by inserting an additional capacitor in series with the shunt APF, the DC-link voltage in the proposed UPQC can also be greatly reduced. As a result, the system cost and power loss of the proposed UPQC is significantly minimized thanks to the use of a smaller number of power switches with a lower rating voltage without degrading the compensation performance of the UPQC. Design of passive components for the proposed UPQC to achieve a good performance is presented in detail. In addition, comparisons on power loss, overall system efficiency, compensation performance between the proposed UPQC and the traditional one are also determined in this paper. Simulation and experimental studies are performed to verify the validity of the proposed topology.

The RLG's Power Supply Design for Attitude Control in the Satellite (저궤도 위성 자세제어용 센서 RLG 전원 공급기 설계)

  • Kim, Eui-Chan;Lee, Heung-Ho
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.1488-1490
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    • 2008
  • The gyroscope is the sensor for detecting the rotation in inertial reference frame and constitute the navigation system together an accelerometer. As the inertial reference equipment for attitude determination and control in the satellite, the mechanical gyroscope has been used but it bring the disturbance for mass unbalance so the disturbance give a bad influence to the observation satellite mission because the mechanical gyroscope has the rotation parts. During the launch, The mechanical gyroscope is weak in vibration, shock and has the defect of narrow operating temperature range so it need the special design in integration. Recently the low orbit observation satellite for seeking the high pointing accuracy of image camera payload accept the FOG(Fiber Optic Gyro) or RLG(Ring Laser Gyro) for the attitude determination and control. The Ring Laser Gyro makes use of the Sanac effect within a resonant ring cavity of a He-Ne laser and has more accuracy than the other gyros. It need the 1000V DC to create the He-Ne plasma in discharge tube. In this paper, the design process of the High Voltage Power Supply for RLG(Ring Laser Gyroscope) is described. The specification for High Voltage Power Supply(HVPS) is proposed. Also, The analysis of flyback converter topology is explained. The Design for the HVPS is composed of the inverter circuit, feedback control circuit, high frequency switching transformer design and voltage doubler circuit.

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A Compact LTCC Dual-Band WLAN Filter using Two Notch Resonators

  • Park, Jun-Hwan;Cheon, Seong-Jong;Park, Jae-Yeong
    • Journal of Electrical Engineering and Technology
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    • v.8 no.1
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    • pp.168-175
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    • 2013
  • This paper presents compact dual-band WLAN filter and filter module. They were developed by embedding all of the passive lumped elements into a LTCC substrate. In order to reduce the size/volume of the filter and avoid EM parasitic couplings between the passive elements, the proposed filter was designed using a 3rd order Chebyshev circuit topology and J-inverter transformation technology. The 3rd order Chebyshev bandpass filter was firstly designed for the band-selection of the 802.11b and was then transformed using finite transmission zeros technologies. Finally, the dual-band filter was realized by adding two notch resonators to the 802.11b filter circuit for the band-selection of the 802.11a/g. The maximum insertion losses in the lower and higher passbands were better than 2.0 and 1.3 dB with minimum return losses of 15 and 14 dB, respectively. Furthermore, the filter was integrated with a diplexer to clearly split the signals between 2 and 5 GHz. The maximum insertion and minimum return losses of the fabricated module were 2.2 and 14 dB at 2.4 - 2.5 GHz, and 1.6 and 19 dB at 5.15 - 5.85 GHz, respectively. The overall volume of the fabricated filter was $2.7{\times}2.3{\times}0.59mm^3$.

Two Phase Clocked Adiabatic Static CMOS Logic and its Logic Family

  • Anuar, Nazrul;Takahashi, Yasuhiro;Sekine, Toshikazu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.1
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    • pp.1-10
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    • 2010
  • This paper proposes a two-phase clocked adiabatic static CMOS logic (2PASCL) circuit that utilizes the principles of adiabatic switching and energy recovery. The low-power 2PASCL circuit uses two complementary split-level sinusoidal power supply clocks whose height is equal to $V_{dd}$. It can be directly derived from static CMOS circuits. By removing the diode from the charging path, higher output amplitude is achieved and the power consumption of the diode is eliminated. 2PASCL has switching activity that is lower than dynamic logic. We also design and simulate NOT, NAND, NOR, and XOR logic gates on the basis of the 2PASCL topology. From the simulation results, we find that 2PASCL 4-inverter chain logic can save up to 79% of dissipated energy as compared to that with a static CMOS logic at transition frequencies of 1 to 100 MHz. The results indicate that 2PASCL technology can be advantageously applied to low power digital devices operated at low frequencies, such as radio-frequency identifications (RFIDs), smart cards, and sensors.

Development of a 10kw stand-alone power processing unit for SOFC (고체산화물형 연료전지를 위한 10㎾급 독립전력변환장치의 개발)

  • 이진희;조진상;장민수;최세완;한수빈
    • The Transactions of the Korean Institute of Power Electronics
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    • v.8 no.6
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    • pp.551-560
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    • 2003
  • This paper summarizes development of a 10KW stand-alone power processing unit for 5KW SOFC-low voltage battery hybrid fuel cell power generation system. The power processing unit Includes three parts a high frequency DC-DC converter boosts low fuel cell voltage, a DC-AC inverter converts a dc voltage into a regulated ac voltage and a bidirectional DC-DC converter charges or discharges the battery. The converter topology, design, control method, and experimental result arc presented to meet the specifications such as efficiency of 90% and cost of $40/KW laid down for the "2003 Future Energy Challenge Competition" organized by the U.S. Department of Energy and IEEE. and IEEE.

A Bidirectional Single-Stage DC/AC Converter for Grid Connected Energy Storage Systems

  • Chen, Jianliang;Liao, Xiaozhong;Sha, Deshang
    • Journal of Power Electronics
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    • v.15 no.4
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    • pp.1026-1034
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    • 2015
  • In this paper, a unified control strategy using the current space vector modulation (CSVM) technique is proposed and applied to a bidirectional three-phase DC/AC converter. The operation of the converter changes with the direction of the power flow. In the charging mode, it works as a buck type rectifier; and during the discharging mode, it operates as a boost type inverter, which makes it suitable as an interface between high voltage AC grids and low voltage energy storage devices. This topology has the following advantages: high conversion efficiency, high power factor at the grid side, tight control of the charging current and fast transition between the charging and discharging modes. The operating principle of the mode analysis, the gate signal generation, the general control strategy and the transition from a constant current (CC) to a constant voltage (CV) in the charging mode are discussed. The proposed control strategy has been validated by simulations and experimental results obtained with a 1kW laboratory prototype using supercapacitors as an energy storage device.

Device characteristics of 2.5kV Gate Commutated Thyristor (2-5kV급 Gate Commutated Thyristor 소자의 제작 특성)

  • Kim, Sang-Cheol;Kim, Hyung-Woo;Seo, Kil-Soo;Kim, Nam-Kyun;Kim, Eun-Dong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.280-283
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    • 2004
  • This paper discribes the design concept, fabrication process and measuring result of 2.5kV Gate Commutated Thyristor devices. Integrated gate commutated thyristors(IGCTs) is the new power semiconductor device used for high power inverter, converter, static var compensator(SVC) etc. Most of the ordinary GTOs(gate turn-off thyristors) are designed as non-punch-through(NPT) concept; i.e. the electric field is reduced to zero within the N-base region. In this paper, we propose transparent anode structure for fast turn-off characteristics. And also, to reach high breakdown voltage, we used 2-stage bevel structure. Bevel angle is very important for high power devices, such as thyristor structure devices. For cathode topology, we designed 430 cathode fingers. Each finger has designed $200{\mu}m$ width and $2600{\mu}m$ length. The breakdown voltage between cathode and anode contact of this fabricated GCT device is 2,715V.

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Fault Detection of BLDC Motor Drive Based on Operating Characteristic (BLDC 전동기 운전 특성을 이용한 고장 검출 기법 구현)

  • Lee, Jung-Dae;Park, Byoung-Gun;Kim, Tae-Sung;Ryu, Ji-Su;Hyun, Dong-Seok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.13 no.2
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    • pp.88-95
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    • 2008
  • This paper proposes a fast fault detection algorithm under open-circuit fault of a switch for a brushless DC(BLDC) motor drive system. This proposed method is configured without the additional devices for fault detection and identification. The fault detection and identification are achieved by a simple algorithm using the operating characteristic of the BLDC motor. After the fault identification, the drive system is reconfigured for continuous operation. This system is reconfigured by four-switch topology connecting a faulty leg to the middle point of DC-link bidirectional switches. This proposed method can also be embedded into existing BLDC motor drive systems as a subroutine without excessive computational effort. The feasibility of a the proposed fault detection algorithm is validated in simulation and experiment.