• 제목/요약/키워드: intermediate input

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Architectural Design for Hardware Implementations of Parallelized Floating-point Rounding Algorithm (부동소수점 라운딩 병렬화 알고리즘의 하드웨어 구현을 위한 구조 설계)

  • 이원희;강준우
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.1025-1028
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    • 1998
  • Hardware to implement the parallelized Floating-point rounding algorithm is described. For parallelized additions, we propose an addition module which has carry selection logic to generate two results accoring to the input valuse. A multiplication module for parallelized multiplications is also proposed to generate Sum and Carry bits as intermediate results. Since these modules process data in IEEE standard Floatingpoint double precision format, they are designed for 53-bit significands including hidden bits. Multiplication module is designed with a Booth multiplier and an array multiplier.

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The development of IF amplifier having low noise and wide AGC range (저잡음 및 넓은 자동 이득 제어 영역을 갖는 IF 증폭기의 설계)

  • 이흥배;엄두찬;김용석;정연철
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.10
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    • pp.73-81
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    • 1994
  • It is AGC(Automatic Gain Control) amplifier to decide characteristics of IF(Intermediate Frequency) processing IC. When demodulated IF signal by PLL type demodulator, the amplitude of input singla should be maintained at a certain amplitude. The AGC amplifier is an important factor to achieve this condition. The AGC amplifier needs the wide dynamic range, the wide AGC range and better noise characteristics. We designed the AGC amplifier to satisfy these characteristics.

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DESIGN OF THE IF DISTRIBUTOR AND V/F CONVERTER FOR RECEIVER SYSTEM (우주전파 수신기를 위한 IF 분배기 및 V/F 컨버터 설계)

  • Kim, Kwang-Dong;Yim, In-Sung;Byun, Do-Young;Song, Min-Gyu
    • Publications of The Korean Astronomical Society
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    • v.22 no.3
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    • pp.83-87
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    • 2007
  • We designed the Intermediate Frequency(IF) distributor for multi beam backend system and manufactured Voltage to Frequency Converter(VFC) to measure the multi-beam receiver performance. Multi beam receiver has 15 channel receivers and can get 15 spectrums at once. The multi beam receiver has more observation efficiency than single beam receiver. We manufactured the 15 IF distributors to distribute IF signal for Autocorrelation spectrometer that is radio signal processor. Also, we manufactured the VF Converter to test the performance measurement of receiver for Korea VLBI Network(KVN) system which is under-construct in Seoul, Ulsan and Jeju. As a result of performance measurement, we could obtain linearity of 99.4% on the input power vs output frequency and measured the operating range of input frequency.

Low IF Resistive FET Mixer for the 4-Ch DBF Receiver with LNA (LNA를 포함하는 4채널 DBF 수신기용 Low IF Resistive FET 믹서)

  • 민경식;고지원;박진생
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2002.11a
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    • pp.16-20
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    • 2002
  • This paper describes the resistive FET mixer with low IF for the 4-Ch DBF(Digital Beam Forming) receiver with LNA(Low Noise Amplifier). This DBF receiver based on the direct conversion method is generally suitable for high-speed wireless mobile communications. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(IF) considered in this research are 2.09 ㎓, 2.08 ㎓ and 10㎒, respectively. The RF input power, LO input power and Vgs are used -10㏈m, 6㏈m and -0.4 V, respectively. In the 4-Ch resistive FET mixer with LNA, the measured IF and harmonic components of 10㎒, 20㎒, 2.09㎓ and 4.17㎓ are about -12.5 ㏈m, -57㏈m, -40㏈m and -54㏈m, respectively. The IF output power observed at each channel of 10㎒ is about -12.5㏈m and it is higher 27.5 ㏈m than the maximum harmonic component of 2.09㎓. Each IF output spectrum of the 4-Ch is observed almost same value and it shows a good agreement with the prediction.

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축대칭 제품의 디프 드로잉 공정에 대한 금형설계 및 금형가공 시스템

  • Park, Sang-Bong;Choi, Young;Kim, Byung-Min;Choi, Jae-Chan
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1996.04a
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    • pp.766-770
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    • 1996
  • In this study, a CAD/CAM system for axisymmetric deep drawing processes has been developed. An approach to the system is based on the knowledge based system. Under the environment of CAD/CAM software of Personal Designer, the system has been written in UPL. The geometries of intermediate and final object in deep drawing process, including processes parameters are input for the CAD/CAM system. The input data can be obtained from the results of Pro-Deep. The parts drawing of die sets for each process is generatedin tool design module of the CAD/CAM system. Also, the die assemblydrawings can be obtained. NC commands for machining of the part can be generated in the developed CAD/CAM system.

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A CAD/CAM System for Axisymmetric Deep Drawing Processes (축대칭 디프-드로잉 공정의 CAD/CAM 시스템)

  • Park, S.B.;Choi, Y.;Kim, B.M.;Choi, J.C.
    • Journal of the Korean Society for Precision Engineering
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    • v.13 no.6
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    • pp.27-33
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    • 1996
  • In this study, a CAD/CAM system for axisymmetric deep drawing processes has been developed. An approach to the system is based on the knowledge based system. Under the environment of CAD/CAM software of Personal Designer, the system has been written in UPL. The geometries of intermediate and final object in deep drawing process, including processes parameters are input for the CAD/CAM system. The input data can be obtained from the results of Pro_Deep. The parts drawing of die sets for each process is generated in tool design module of the CAD/CAM system. Also. the die assembly drawings can be obtained. NC commands for machining of the part can be generated in the developed CAD/CAM system.

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Application of Design Process Modeling for Mold Design (설계 과정 모델링 기법을 적용한 금형 설계)

  • 장진우;임성락;김석렬;이상헌;우윤환;이강수;허영무;양진석;배규형
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2002.10a
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    • pp.954-957
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    • 2002
  • The objective of design process modeling is a systematic support of rapid redesign process fur a modified input data. The design process modeling is realized by storing key parameters or geometric entities used in the intermediate design steps and reusing them for change of the designed parts or assemblies according to the modified input. In this paper, we adopted and implemented the design process modeling approach to our injection mold design system developed based on the Unigraphics system. It was proved that the productivity of mold redesign process is raised highly by introducing the design process modeling technique mold design system.

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A Study on the Kernel Formation & Development for Lean Burn and EGR Engine (희박연소 및 EGR 엔진에서 초기 화염액 생성 및 성장에 관한 연구)

  • 송정훈;선우명호
    • Transactions of the Korean Society of Automotive Engineers
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    • v.7 no.8
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    • pp.24-33
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    • 1999
  • This paper investigate the effects of the variations of engine operation condition in the flame kernel formation and developmnet . A model for calculating the initial kernel development in spark ignition engines is formualted. It considered input of electrical energy, combustion energy release and heat transfer to the spark plyg, cylinder head, and unburned mixture. The model also takes into accounts strain rate of initial kernel and residual gas fraction. The breakdown process and the subsequent electrical power input initially control the kernel growth while intermediate growth is mainly dominated by diffusion or conduction. Then, the flame propagates by the chemical energy and turbulent flame expansion. Flame kernel development also influenced by engine operating conditions, for example, EGR rate, air-fuel ration and intake manifold pressure.

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Multi-stage Speech Recognition Using Confidence Vector (신뢰도 벡터 기반의 다단계 음성인식)

  • Jeon, Hyung-Bae;Hwang, Kyu-Woong;Chung, Hoon;Kim, Seung-Hi;Park, Jun;Lee, Yun-Keun
    • MALSORI
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    • no.63
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    • pp.113-124
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    • 2007
  • In this paper, we propose a use of confidence vector as an intermediate input feature for multi-stage based speech recognition architecture to improve recognition accuracy. A multi-stage speech recognition structure is introduced as a method to reduce the computational complexity of the decoding procedure and then accomplish faster speech recognition. Conventional multi-stage speech recognition is usually composed of three stages, acoustic search, lexical search, and acoustic re-scoring. In this paper, we focus on improving the accuracy of the lexical decoding by introducing a confidence vector as an input feature instead of phoneme which was used typically. We take experimental results on 220K Korean Point-of-Interest (POI) domain and the experimental results show that the proposed method contributes on improving accuracy.

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Design of a Rceiver MMIC for the CDMA Terminal (CDMA 단말기용 수신단 MMIC 설계)

  • 권태운;최재하
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.1
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    • pp.65-70
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    • 2001
  • This paper presents a Receiver MMIC for the CDMA terminal. The complete circuit is composed of Low Noise Amplifier, Down Conversion Mixer, Intermediate Frequency Amplifier and Bias circuit. The Bias circuit implementation, which allows for compensation for threshold voltage and power supply voltage variation are provided. The proposed topology has high linearity and low noise characteristics. Results of the designed circuit are as follows: Overall conversion gain is 28.5 dB, input IP3 of LNA is 8 dBm, input IP3 of down conversion mixer is 0 dBm and total DC current consumption is 22.1 mA.

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