• 제목/요약/키워드: interface treatment

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Optimization of Electrical/Optical Properties of ITO/Al Based Reflector for Vertical-type UV LEDs via SF6 Plasma Treatments (불소계열 플라즈마 처리를 통한 수직형 UV LED용 ITO/Al 기반 반사전극의 전기적/광학적 특성 최적화)

  • Shin, Ki-Seob;Kim, Dong-Yoon;Kim, Tae-Geun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.11
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    • pp.911-914
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    • 2011
  • We optimize electrical and optical properties of thermal and SF6 plasma treated indium tin oxide (ITO)/Al based reflector for high-power ultraviolet (UV) light-emitting diodes (LEDs). After thermal and $SF_6$ plasma treatments of ITO/Al reflector, the specific contact resistance decreased from $1.04{\times}10^{-3}\;{\Omega}{\cdot}cm^2$ to $9.21{\times}10^{-4}\;{\Omega}{\cdot}cm^2$, while the reflectance increased from 58% to 70% at the 365 nm wavelength. The low resistance and high reflectance of ITO/Al reflector are attributed to the reduced Schottky barrier height (SBH) between the ITO and AlGaN by large electronegativity of fluorine species and reduced interface roughness between the ITO and Al, respectively.

Effect of the fixed oxide charge on the metal-oxide-silicon-on-insulator structures (metal-oxide-silicon-on-insulator 구조에서 고정 산화막 전하가 미치는 영향)

  • Jo, Yeong-Deuk;Kim, Ji-Hong;Cho, Dae-Hyung;Moon, Byung-Moo;Koh, Jung-Hyuk;Ha, Jae-Geun;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.83-83
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    • 2008
  • Metal-oxide-silicon-on-insulator (MOSOI) structures were fabricated to study the effect caused by reactive ion etching (RIE) and sacrificial oxidation process on silicon-on-insulator (SOI) layer. The MOSOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching treatment. The measured C-V curves were compared to the numerical results from 2-dimensional (2-D) simulations. The measurements revealed that the profile of C-V curves significantly changes depending on the SOI surface condition of the MOSOI capacitors. The shift in the measured C-V curves, due to the difference of the fixed oxide charge ($Q_f$), together with the numerical simulation analysis and atomic force microscopy (AFM) analysis, allowed extracting the fixed oxide charges ($Q_f$) in the structures as well as 2-D carrier distribution profiles.

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A Study on Characterization of P-N Junction Using Silicon Direct Bonding (실리콘 직접 본딩에 의한 P-N 접합의 특성에 관한 연구)

  • Jung, Won-Chae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.10
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    • pp.615-624
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    • 2017
  • This study investigated the various physical and electrical effects of silicon direct bonding. Direct bonding means the joining of two wafers together without an intermediate layer. If the surfaces are flat, and made clean and smooth using HF treatment to remove the native oxide layer, they can stick together when brought into contact and form a weak bond depending on the physical forces at room temperature. An IR camera and acoustic systems were used to analyze the voids and bonding conditions in an interface layer during bonding experiments. The I-V and C-V characteristics are also reported herein. The capacitance values for a range of frequencies were measured using a LCR meter. Direct wafer bonding of silicon is a simple method to fuse two wafers together; however, it is difficult to achieve perfect bonding of the two wafers. The direct bonding technology can be used for MEMS and other applications in three-dimensional integrated circuits and special devices.

Stability of implant screw joint (임플란트 나사의 안정성)

  • Chung, Chae-Heon;Kwak, Jong-Ha;Jang, Doo-IK
    • Journal of Dental Rehabilitation and Applied Science
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    • v.19 no.2
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    • pp.125-137
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    • 2003
  • The use of screw-retaind prosthesis on an osseointegrated implant is a popular treatment modality offering relative ease in the removal of the restoration. One of the complications associated with this modality is the loosening of the abutment and coping screws. Loosening of the screws results in patient dissatisfaction, frustration to the dentist and, if left untreated, component fracture. There are several factors which contribute to the loosening of implant components which can be controlled by the restorative dentist and lab technician. This article offers pratical solutions to minimize this clinical problem and describes the factors involved in maintaining a stable screw joint assembly. To avoid joint failure, adherence to specific clinical, as well as mechanical, parameters is critical. With respect to hardware, optimal tolerance and fit, minimal rotational play, best physical properties, a predictable interface, and optimal torque application are mandatory. In the clinical arena, optimal implant distribution; load in line with implant axis; optimal number, diameter, and length of implants; elimination of cantilevers; optimal prosthesis fit; and occlusal load control are equally important.

Analysis of Electrical Properties of Ti/Pt/Au Schottky Contacts on (n)GaAs Formed by Electron Beam Deposition and RF Sputtering

  • Sehgal, B-K;Balakrishnan, V-R;R Gulati;Tewari, S-P
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.1
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    • pp.1-12
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    • 2003
  • This paper describes a study on the abnormal behavior of the electrical characteristics of the (n)GaAs/Ti/Pt/Au Schottky contacts prepared by the two techniques of electron beam deposition and rf sputtering and after an annealing treatment. The samples were characterized by I-V and C-V measurements carried out over the temperature range of 150 - 350 K both in the as prepared state and after a 300 C, 30 min. anneal step. The variation of ideality factor with forward bias, the variation of ideality factor and barrier height with temperature and the difference between the capacitance barrier and current barrier show the presence of a thin interfacial oxide layer along with barrier height inhomogenieties at the metal/semiconductor interface. This barrier height inhomogeneity model also explains the lower barrier height for the sputtered samples to be due to the presence of low barrier height patches produced because of high plasma energy. After the annealing step the contacts prepared by electron beam have the highest typical current barrier height of 0.85 eV and capacitance barrier height of 0.86 eV whereas those prepared by sputtering (at the highest power studied) have the lowest typical current barrier height of 0.67 eV and capacitance barrier height of 0.78 eV.

Fabrication and Characterization of TiNi Shape Memory Alloy Fiber Reinforced 6061 Aluminum Matrix Composite by Using Hot Press (핫프레스법에 의한 TiNi/Al6061 형상기억복합재료의 제조 및 기계적 특성에 관한 연구)

  • Park, Dong-Sung;Lee, Jun-Hee;Lee, Guy-Chang;Park, Young-Chul
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.26 no.7
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    • pp.1223-1231
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    • 2002
  • Al alloy matrix composite with TiNi shape memory fiber as reinforcement has been fabricated by hot pressing to investigate microstructures and mechanical properties. The analysis of SEM and EDS showed that the composites have shown good interface bonding. The stress-strain behavior of the composites was evaluated at temperatures between 363K and room temperature as a function of prestrain, and it showed that the yield stress at 363K was higher than that of the room temperature. Especially, the yield stress of this composite increases with increasing the amount of prestrain, and it also depends on the volume fraction of fiber and heat treatment. The smartness of the composite is given due to the shape memory effect of the TiNi fiber which generates compressive residual stress in the matrix material when heated after being prestrained. Microstructural observation has revealed that interfacial reactions occur between the matrix and fiber, creating two intermetallic layers.

Variation of Morphology of Solid Particles and Microstructure in Al-Si, Al-Cu and Mg-Al Alloys During Isothermal Heat-Treatment at Semi-Solid Temperatures (반고상 온도구역에서 등온유지한 Al-Si, Al-Cu 및 Mg-Al합금의 고상형상 및 조직의 변화)

  • Jung, Woon-Jae;Kim, Ki-Tae;Hong, Chun-Pyo
    • Journal of Korea Foundry Society
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    • v.16 no.6
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    • pp.556-564
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    • 1996
  • Variation of shape and size of solid particles and solute redistribution in Mg-9wt.%Al, AI-4.5wt.% Cu, and AI-7wt.%Si alloys were investigated when they were heated to semi-solid temperatures and held without stirring. In the case of Mg-9wt.% Al and Al-4.5wt.%Cu alloys, the polygonal shaped solid particles were agglomerated with non-uniform distribution, and there were no disappearance of the solid/solid boundary until the end of melting. But in the case of an Al-7wt.%Si alloys, two or three spherical shaped particles were coalesced or separated individually, and the coalesced particles had no solid/solid interface on the contrary to the prevous case. The maximum size of solid particles during isothermal heating at high temperature was smaller than that at lower temperature, but the time required to reach the maximum size at high temperature was shorter than that at lower temperature. The concentrations of main solute atom whose distribution coefficient is lower than 1, decreased in the primary solid particles as the liquid fraction increased, and the gradient of solute concentration was steeper in Mg-9wt.%Al alloy and Al-4.5wt.%Cu alloy than that of Al-7wt.%Si alloy.

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Amorphous silicon thin-film solar cells with high open circuit voltage by using textured ZnO:Al front TCO (ZnO:Al 투명전도막을 이용한 높은 개방전압을 갖는 비정질 실리콘 박막 태양전지 제조)

  • Lee, Jeeong-Chul;Ahn, Se-Hin;Yun, Jae-Ho;Song, Jin-Soo;Yoon, Kyung-Hoon
    • New & Renewable Energy
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    • v.2 no.3
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    • pp.31-36
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    • 2006
  • Superstrate pin amorphous silicon thin-film(a-Si:H) solar cells are prepared on $SnO_2:F$ and ZnO:Al transparent conducting oxides(TCO) in order to see the effect of TCO/p-layers on a-Si:H solar cell operation. The solar cells prepared on textured ZnO:Al have higher open circuit voltage VOC than cells prepared on $SnO_2:F$. Presence of thin microcrystalline p-type silicon layer(${\mu}c-Si:H$) between ZnO:Al and p a-SiC:H plays a major role by causing improvement in fill factor as well as $V_{OC}$ of a-Si:H solar cells prepared on ZnO:Al TCO. Without any treatment of pi interface, we could obtain high $V_{OC}$ of 994mV while keeping fill factor(72.7%) and short circuit current density $J_{SC}$ at the same level as for the cells on $SnO_2:F$ TCO. This high $V_{OC}$ value can be attributed to modification in the current transport in this region due to creation of a potential barrier.

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Poly-crystalline Silicon Thin Film Transistor: a Two-dimensional Threshold Voltage Analysis using Green's Function Approach

  • Sehgal, Amit;Mangla, Tina;Gupta, Mridula;Gupta, R.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.4
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    • pp.287-298
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    • 2007
  • A two-dimensional treatment of the potential distribution under the depletion approximation is presented for poly-crystalline silicon thin film transistors. Green's function approach is adopted to solve the two-dimensional Poisson's equation. The solution for the potential distribution is derived using Neumann's boundary condition at the silicon-silicon di-oxide interface. The developed model gives insight into device behavior due to the effects of traps and grain-boundaries. Also short-channel effects and drain induced barrier lowering effects are incorporated in the model. The potential distribution and electric field variation with various device parameters is shown. An analysis of threshold voltage is also presented. The results obtained show good agreement with simulated results and numerical modeling based on the finite difference method, thus demonstrating the validity of our model.

A Study on the 3-Dimensional Modeling of Spur Gear Using VisualLISP (VisualLISP을 이용한 스퍼기어의 3차원 모델링에 관한 연구)

  • 이승수;김민주;김래호;전언찬
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.13 no.1
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    • pp.48-54
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    • 2004
  • This paper describes the development of automatic shape design program for spur gear. It produces automatically third-dimensional surface and solid model used in CAD/CAM system with inputting simple measurements. This program can maximize user's convenience and get surface and solid model quickly as accepting GUI(graphic user interface). Automatic shape design program for spur gear was developed by Visual LISP, a developer program. Besides, a geometrical method and a mathematical algerian are used in this program. Use frequency of a fine spur gear is on the increase recently and manufacture process of this gear is heat treatment after press processing with molding. In this press processing, the upper punch portion of a fine spur gear shape is drafted by CAM. Therefore, estimated that surface and solid model of spur gear used to CAM are needed in this research. In this research, after 2 ㎜ gear was modeled by auto shape design program, the upper punch portion of a fine spur gear was manufactured as giving third-dimensional model to CAM software and then, displayed the result as applying to press process.