• 대한전기학회논문지:전기기기및에너지변환시스템부문B
• /
• 제50권1호
• /
• pp.15-22
• /
• 2001

In this paper, a VSC(Voltage Sag Corrector) is discussed for the purpose of power quality enhancement. A fast detecting technique of voltage sag is accomplished through the detection of instantaneous value on synchronous reference frame. A robust characteristic against the noise is available by inserting the first order low pass filter in the detection circuit. The formula and the filter design process is described properly with the mathematical equations. Because the VSC system supply the active power to load, it is required to design the proper size of the energy storage system, In this paper, the capacitor bank is used as an energy storage system, and the size of the capacitor is designed from the point of view of input/output energy as the output power rating and the amplitude and duration time of the voltage sag. The simulation is accomplished by PSCAD/EMTDC.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2004년도 하계학술대회 논문집 A
• /
• pp.351-353
• /
• 2004

In recent years, customers and power supplies are interested in power quality. Demands of customers are change from standard quality of distribution power system to various high quality of distribution power system. so, it is necessary to apply power quality compensator. in our project, we develop the UPQC(Unfied Power Quality Compensator of 45kVA which compensates power factor and voltage sag, interruption. it is very frequently occurred power quality $problems^{[1-3]}$ As a series and shunt compensator, UPQC consists of two inverters with common do link capacitor bank. It compensates the current quality in the shunt part and the voltage quality in the series part. In this paper, we present the design and control algorithm for 4SkVA UPQC system. As a control algorithm is implemented by digital controller, we consider sample-and-hold of signals. In this simulation, we use EMTDC/PSCAD V3.0 software which can simulate instantaneous voltage and current.

• 전력전자학회논문지
• /
• 제5권5호
• /
• pp.484-492
• /
• 2000

본 논문에서는 고조파전류 보상기능을 갖는 전압 보상기에 관한 연구를 수행하고 그 보상 특성을 해석하였다. 제안된 보상시스템은 하이브리드형 능동전력필터에서와 같이 LC로 구성되어 전력선에 병렬로 연결되는 수동필터와 직렬 변압기를 사용하여 전력선에 직렬로 연결되는 PWM 컨버터를 동시에 사용하는 회로구조를 갖는다. 제안된 보상시스템을 통해 다이오드 정류기와 같은 비선형 부하로 인해 발생되는 고조파 전류의 보상 및 전원 이상 현상으로 발생되는 전원측 이상 전압의 보상을 모두 수행한다. 단상 등가회로를 통해 보상시스템의 동작 원리를 설명하고 d-q 동기좌표계 축 상에서 보상시스템의 모든 제어를 수행하는 제어 알고리즘의 개발을 수행하였으며 실험을 통해 제안된 보상시스템의 보상특성을 확인하였다.

• 전기학회논문지P
• /
• 제55권1호
• /
• pp.21-25
• /
• 2006

This paper describes the novel control techniques design of VSC(Voltage Sag Corrector) for the purpose of power line quality enhancement. A fast detecting technique of voltage sag is implemented through the detection of instantaneous value on synchronous rotating do-reference frame. The first order digital filter is added in the detection algorithm to protect the insensitive characteristics against the noise. The relationship between the total detection time and cut-off frequency of the filter is described. The size of the capacitor bank used as the energy storage element is designed from the point of view of input/output energy with circuit analysis. Finally, the validity of the proposed scheme is proven through the simulated results.

• 전력전자학회논문지
• /
• 제4권3호
• /
• pp.275-284
• /
• 1999

3산 전력 시스템에서 불평형 전원의 전압은 대칭좌표법에 의하여 정상, 역상, 영상성분으로 각각 분해 될 수 있고 또한 전력 시스템에 중성선이 없는 경우 영상성분은 부하측에 나타나지 않게 된다. 따라서 중성선이 없는 불평형 시스템에서는 전원측의 역상성분만을 검출하여 보상함으로써 부하측에 평형된 전압을 공급할 수 있을 뿐만 아니라 정상성분의 크기를 제어함으로써 부하에 인가되는 전압의 크기를 조정하는 것이 가능하다. 아울러 이러한 불평형 전압에 의한 각 대칭분은 3상 2상 변환을 통한 동기좌표축상에서의 효율적인 검출이 가능한데, 본 논문에서는 전원의 불평형 성분을 동기좌표축 상에서 순시적으로 검출하여 이를 보상하고 부하의 전압조정 기능 역시 수행하는 순간전압보상기의 보상 알고리즘 및 이때 좌표변환시 필요한 전원의 위상각 정보를 전원의 정상성분에 일치시키는 새로운 위상각 검출 알고리즘을 제안한다. 제안된 보상 시스템의 성능 및 특성을 시뮬레이션을 통하여 해석하고 실험으로써 검증하였다.

• Journal of Electrical Engineering and Technology
• /
• 제5권1호
• /
• pp.116-128
• /
• 2010

Modeling of the three phase electric arc furnace and its voltage flicker mitigation are the purposes of this paper. For modeling of the electric arc furnace, at first, the arc is modeled by using current-voltage characteristic of a real arc. Then, the arc random characteristic has been taken into account by modulating the ac voltage via a band limited white noise. The electric arc furnace compensation with static VAr compensator, Thyristor Controlled Reactor combined with a Fixed Capacitor bank (TCR/FC), is discussed for closed loop control of the compensator. Instantaneous flicker sensation curves, before and after accomplishing compensation, are measured based on IEC standard. A new method for controlling TCR/FC compensator is proposed. This method is based on applying a predictive approach with closed loop control of the TCR/FC. In this method, by using the previous samples of the load reactive power, the future values of the load reactive power are predicted in order to consider the time delay in the compensator control. Also, in closed loop control, two different approaches are considered. The former is based on voltage regulation at the point of common coupling (PCC) and the later is based on enhancement of power factor at PCC. Finally, in order to show the effectiveness of the proposed methodology, the simulation results are provided.

• 전기학회논문지P
• /
• 제54권4호
• /
• pp.179-184
• /
• 2005

This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). A new switching scheme is developed for the SVC system. To improve the unbalanced problem of the DC capacitor voltages, the rotated switching scheme of fundamental frequency is newly used. The optimized fundamental switching pattern with low switching frequency is adapted to be suitable for high application. The selective harmonic elimination method(SHEM) allows to keep the total harmonic distortion(THD) low in the output voltage of multilevel inverter. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

• 전기학회논문지P
• /
• 제52권4호
• /
• pp.172-178
• /
• 2003

This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). This method has the primary advantage that the number of voltage levels can be increased for a given number of semiconductor devices when compared to the conventional control methods. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. From the mathematical model of the system, the design procedures of the circuit parameters L and C are presented in this thesis. To meet the specific total harmonic distortion(THD) and ripple factor of the capacitor voltage, the circuit parameters L and C are designed. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
• /
• pp.561-565
• /
• 2001

This paper proposes a new switching scheme of a static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). To improve the un­balanced problem of the DC capacitor voltages, the rotated switching scheme of fundamental frequency is newly used. The optimized fundamental switching pattern with low switching frequency is adapted to be suitable for high application. The selective harmonic elimination method(SHEM) allows to keep the total harmonic distortion(THD) low in the output voltage of multilevel inverter. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2003년도 학술대회 논문집 전문대학교육위원
• /
• pp.144-148
• /
• 2003

This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). To improve the unbalanced problem of the DC capacitor voltages, the rotated switching scheme of fundamental frequency is newly used. The optimized fundamental switching pattern with low switching frequency is adapted to be suitable for high application. The selective harmonic elimination method(SHEM) allows to keep the total harmonic distortion(THD) low in the output voltage of multilevel inverter. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. Simulated and experimental results are also presented and discussed to validate the proposed schemes.