• Title/Summary/Keyword: input/output devices

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Design of AC PDP driving Circuit for Low Power Consumption (저전력화를 위한 AC형 PDP구동회로의 설계)

  • Jang, Yoon-Seok;Choi, Jin-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.11
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    • pp.2014-2019
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    • 2006
  • PDP driving circuit requires switching devices and capacitors to stand up high voltages over 160V. This is the main cause that the power consumption and the cost of a PDP driving circuit increase. Conventional PDP driving circuits consist of 3 voltage sources and 16 switching devices. In this paper, we propose a PDP driving circuit using 2 voltage sources and 12 switching devices that can be operated with a lower supply voltage than conventional driving circuit. The operation of the proposed driving circuit is verified by the computer simulation. Simulation results show that the output signal can drive PDP cell when the supply voltage is higher than 45V in the input frequency range 70kHz to 100kHz.

Novel Non-Isolated DC-DC Converter Topology with High Step-Up Voltage Gain and Low Voltage Stress Characteristics Using Single Switch and Voltage Multipliers (단일 스위치와 전압 체배 회로를 이용하는 고변압비와 낮은 전압 스트레스를 가진 새로운 비절연형 DC-DC 컨버터 토폴로지)

  • Tran, Manh Tuan;Amin, Saghir;Choi, Woojin
    • Proceedings of the KIPE Conference
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    • 2019.07a
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    • pp.83-85
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    • 2019
  • The use of high voltage gain converters is essential for the distributed power generation systems with renewable energy sources such as the fuel cells and solar cells due to their low voltage characteristics. In this paper, a high voltage gain topology combining cascode Inverting Buck-Boost converter and voltage multiplier structure is introduced. In proposed converter, the input voltage is connected in series at the output, the portion of input power is directly delivered to the load which results in continuous input current. In addition, the voltage multiplier stage stacked in proper manner is not only enhance high step-up voltage gain ratio but also significantly reduce the voltage stress across all semiconductor devices and capacitors. As a result, the high current-low voltage switches can be employed for higher efficiency and lower cost. In order to show the feasibility of the proposed topology, the operation principle is presented and the steady-state characteristic is analyzed in detail. A 380W-40/380V prototype converter was built to validate the effectiveness of proposed converter.

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New Isolated Zero Voltage Switching PWM Boost Converter (새로운 절연된 영전압 스위칭 PWM 부스트 컨버터)

  • Cho, Eun-Jin;Moon, Gun-Woo;Jung, Young-Suk;Youn, Myung-Joong
    • Proceedings of the KIEE Conference
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    • 1994.07a
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    • pp.535-538
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    • 1994
  • In this paper, an isolated ZVS-PWM boost converter is proposed for single stage line conversion. For power factor correction, we used the half bridge topology at the primary side of isolation transformer permitting switching devices to operate under ZVS by using circuit parastics and operating at a fixed duty ratio near 50%. Thus the relatively continuous input current distortion and small size input filter are also achievable. The ZVS-PWM boost operation of the proposed converter can be achieved by using the boost inductor $L_f$, main switch $Q_3$, and simple auxiliary circuit at the secondary side of isolation transformer. The secondary side circuit differ from a conventional PWM boost converter by introduction a simple auxiliary circuit. The auxiliary circuit is actived only during a short switching transition time to create the ZVS condition for the main switch as that of the ZVT-PWM boost converter. With a single stage, it is possible to achieve a sinusoidal line current at unity power factor as well as the isolated 48V DC output. Comparing to the two stage schemes, overall effiency of the proposed converter is highly improved due to the effective ZVS of all devices as well as single stage power conversion. Thus, it can be operated at high switching frequency allowing use of small size input filter. Minimum voltage and current stress make it high power application possible.

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An Active Voltage Doubling Rectifier with Unbalanced-Biased Comparators for Piezoelectric Energy Harvesters

  • Liu, Lianxi;Mu, Junchao;Yuan, Wenzhi;Tu, Wei;Zhu, Zhangming;Yang, Yintang
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1226-1235
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    • 2016
  • For wearable health monitoring systems, a fundamental problem is the limited space for storing energy, which can be translated into a short operational life. In this paper, a highly efficient active voltage doubling rectifier with a wide input range for micro-piezoelectric energy harvesting systems is proposed. To obtain a higher output voltage, the Dickson charge pump topology is chosen in this design. By replacing the passive diodes with unbalanced-biased comparator-controlled active counterparts, the proposed rectifier minimizes the voltage losses along the conduction path and solves the reverse leakage problem caused by conventional comparator-controlled active diodes. To improve the rectifier input voltage sensitivity and decrease the minimum operational input voltage, two low power common-gate comparators are introduced in the proposed design. To keep the comparator from oscillating, a positive feedback loop formed by the capacitor C is added to it. Based on the SMIC 0.18-μm standard CMOS process, the proposed rectifier is simulated and implemented. The area of the whole chip is 0.91×0.97 mm2, while the rectifier core occupies only 13% of this area. The measured results show that the proposed rectifier can operate properly with input amplitudes ranging from 0.2 to 1.0V and with frequencies ranging from 20 to 3000 Hz. The proposed rectifier can achieve a 92.5% power conversion efficiency (PCE) with input amplitudes equal to 0.6 V at 200 Hz. The voltage conversion efficiency (VCE) is around 93% for input amplitudes greater than 0.3 V and load resistances larger than 20kΩ.

Quad-Band RF CMOS Power Amplifier for Wireless Communications (무선 통신을 위한 Quad-band RF CMOS 전력증폭기)

  • Lee, Milim;Yang, Junhyuk;Park, Changkun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.23 no.7
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    • pp.807-815
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    • 2019
  • In this paper, we design a power amplifier to support quad-band in wireless communication devices using RF CMOS 180-nm process. The proposed power amplifier consists of low-band 0.9, 1.8, and 2.4 GHz and high-band 5 GHz. We proposed a structure that can support each input matching network without using a switch. For maximum linear output power, the output matching network was designed for impedance conversion to the power matching point. The fabricated quad-band power amplifier was verified using modulation signals. The long-term evolution(LTE) 10 MHz modulated signal was used for 0.9 and 1.8 GHz, and the measured output power is 23.55 and 24.23 dBm, respectively. The LTE 20 MHz modulated signal was used for 1.8 GHz, and the measured output power is 22.24 dBm. The wireless local area network(WLAN) 802.11n modulated signal was used for 2.4 GHz and 5.0 GHz. We obtain maximum linear output power of 20.58 dBm at 2.4 GHz and 17.7 dBm at 5.0 GHz.

A Study to Improve the DC Output Waveforms of AFE Three-Phase PWM Rectifiers (AFE 방식 3상 PWM 정류기의 직류 출력파형 개선에 관한 연구)

  • Jeon, Hyeon-Min;Yoon, Kyoung-Kuk;Kim, Jong-Su
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.23 no.6
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    • pp.739-745
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    • 2017
  • Many studies have been conducted to reduce environmental pollution by ships and reduce fuel consumption. As part of this effort, research on power conversion systems through DC distribution systems that link renewable energy with conventional power grids has been pursued as well. The diode rectifiers currently used include many lower harmonics in the input current of the load and distort supply voltage to lower the power quality of the whole system. This distortion of voltage waveforms causes the malfunctions of generators, load devices and inverter pole switching elements, resulting in a large number of switching losses. In this paper, a controller is presented to improve DC output waveforms, the input Power Factor and the THD of an AFE type PWM rectifier used for PLL. DC output voltage waveforms have been improved, and the input Power Factor can now be matched to the unit power factor. In addition, the THD of the input power supply has been proven by simulation to comply with the requirements of IEEE Std514-2014.

Secure Configuration Scheme for Internet of Things using NFC as OOB Channel (NFC를 OOB 채널로 활용한 사물인터넷 보안 설정 기술)

  • Kim, Jeongin;Kang, Namhi
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.3
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    • pp.13-19
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    • 2016
  • The PSK (Pre-shared Secret Key) based method is appropriate for the IoT environment consisting of lightweight devices since this method requires less computing time and energy than the method to configure the session key based on the public key algorithm. A fundamental prerequisite for the PSK based method is that PSK should have been configured between the communication entities safely in advance. However, in case of a small sensor or actuator, no input and output interface such as keyboard and monitor required for configuration exists, so it is more difficult to configure PSK for such lightweight devices safely in the IoT environment than the previous Internet devices. Especially, normal users lack expertise in security so they face difficulty in configuration. Therefore, the default value configured at the time of manufacturing at factories is used or the device installer configures PSK in most cases. In such case, it is a matter for consideration whether all installers and manufacturers can be trusted or not. In order to solve such problem, this paper proposes a secure bootstrapping scheme, which utilizes the NFC (Near Field Communication) as an OOB (Out-Of-Band) channel, for lightweight devices with limited resources.

Secure Configuration Scheme of Pre-shared Key for Lightweight Devices in Internet of Things (사물인터넷의 경량화 장치를 위한 안전한 Pre-shared Key 설정 기술)

  • Kim, Jeongin;Kang, Namhi
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.15 no.3
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    • pp.1-6
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    • 2015
  • The IoT(Internet of things) technology enable objects around user to be connected with each other for sharing information. To support security is the mandatory requirement in IoT because it is related to the disclosure of private information but also directly related to the human safety. However, it is difficult to apply traditional security mechanism into lightweight devices. This is owing to the fact that many IoT devices are generally resource constrained and powered by battery. PSK(Pre-Shared Key) based approach, which share secret key in advance between communication entities thereafter operate security functions, is suitable for light-weight device. That is because PSK is costly efficient than a session key establishment approach based on public key algorithm. However, how to safely set a PSK of the lightweight device in advance is a difficult issue because input/output interfaces such as keyboard or display are constrained in general lightweight devices. To solve the problem, we propose and develop a secure PSK configuration scheme for resource constrained devices in IoT.

60 GHz Low Noise Amplifier MMIC for IEEE802.15.3c WPAN System (IEEE802.15.3c WPAN 시스템을 위한 60 GHz 저잡음증폭기 MMIC)

  • Chang, Woo-Jin;Ji, Hong-Gu;Lim, Jong-Won;Ahn, Ho-Kyun;Kim, Hae-Cheon;Oh, Seung-Hyueb
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.227-228
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    • 2006
  • In this paper, we introduce the design and fabrication of 60 GHz low noise amplifier MMIC for IEEE802.15.3c WPAN system. The 60 GHz LNA was designed using ETRI's $0.12{\mu}m$ PHEMT process. The PHEMT shows a peak transconductance ($G_{m,peak}$) of 500 mS/mm, a threshold voltage of -1.2 V, and a drain saturation current of 49 mA for 2 fingers and $100{\mu}m$ total gate width (2f100) at $V_{ds}$=2 V. The RF characteristics of the PHEMT show a cutoff frequency, $f_T$, of 97 GHz, and a maximum oscillation frequency, $f_{max}$, of 166 GHz. The performances of the fabricated 60 GHz LNA MMIC are operating frequency of $60.5{\sim}62.0\;GHz$, small signal gain ($S_{21}$) of $17.4{\sim}18.1\;dB$, gain flatness of 0.7 dB, an input reflection coefficient ($S_{11}$) of $-14{\sim}-3\;dB$, output reflection coefficient ($S_{22}$) of $-11{\sim}-5\;dB$ and noise figure (NF) of 4.5 dB at 60.75 GHz. The chip size of the amplifier MMIC was $3.8{\times}1.4\;mm^2$.

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A New Automatic Compensation Network for System-on-Chip Transceivers

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • ETRI Journal
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    • v.29 no.3
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    • pp.371-380
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    • 2007
  • This paper proposes a new automatic compensation network (ACN) for a system-on-chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on-chip ACN using 0.18 ${\mu}m$ SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design-for-testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.

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