• Journal of Electrical Engineering and Technology
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• v.6 no.4
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• pp.573-579
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• 2011

To meet the scalability and performance requirements of data analyses, which often involve voluminous data, efficient parallel or concurrent algorithms and frameworks are essential. We present a high-performance Korean morphological analyzer which employs the MapReduce framework on the graphics processing unit (GPU). MapReduce is a programming framework introduced by Google to aid the development of web search applications on a large number of central processing units (CPUs). GPUs are designed as a special-purpose co-processor. Their programming interfaces are typically formulated for graphics applications. Compared to CPUs, GPUs have greater computation power and memory bandwidth; however, GPUs are more difficult to program because of the design of their architectures. The performance of the Korean morphological analyzer using the MapReduce framework on the GPU is evaluated in comparison with the CPU-based model. The proposed Korean Morphological analyzer shows promising scalable performance on distributed computing with the GPU.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.54 no.4
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• pp.217-223
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• 2005

In this paper, we have proposed a secure dynamic ID allocation protocol using mutual authentication on the RFID tag. Currently, there are many security protocols focused on the low-price RFID tag. The conventional low-price tags have limitation of computing power and rewritability of memory. The proposed secure dynamic ID allocation protocol targets to the high-performance RFID tags which have more powerful performance than conventional low-price tag by allocating a dynamic ID to RFID using mutual authentication based on symmetric encryption algorithm. This protocol can be used as a partial solution for ID tracing and forgery.

• Korean Journal of Optics and Photonics
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• v.5 no.4
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• pp.439-444
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• 1994

When diffraction by arbitrary two-dimensional surface-relief dielectric gratings is analyzed using the rigorous three-dimensional vector coupled-wave analysis, it is found that the matrix eigenvalue problem pertaining to the analysis can always be simplified to that for a matrix which has the dimension of a quarter of the original, so that computing time and memory requirements for computer may be greatly reduced. However this kind of simplification can not be obtained in the case of volume diffraction gratings. tings.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.6
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• pp.353-357
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• 2014

This paper, presents an efficient hardware architecture of high performance SVC(Scalable Video Coding). This platform uses dedicated hardware architecture to improve its performance. The architecture was prototyped in Verilog HDL and synthesized using the Synopsys Design Compiler with a 65nm standard cell library. At a clock frequency of 266MHz, This platform contains 2,500,000 logic gates and 750,000 memory gates. The performance of the platform is indicated by 30 frames/s of the SVC encoder Full HD($1920{\times}1080$), HD($1280{\times}720$), and D1($720{\times}480$) at 266MHz.

• 한국전산유체공학회:학술대회논문집
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• 2006.05a
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• pp.275-278
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• 2006

Japan Aerospace Exploration Agency has introduced a new terascale clusterd SMP system as a main compute engine of Numerical Simulator III for aerospace science and engineering research purposes. The system is using Fujitsu PRIMEPOWER HPC2500; it has computing capability of 9.3Tflop/s peak performance and 3.6TB of user memory, with about 1,800 scalar processors for computation. In this paper, we first present the performance evaluation results for aerospace CFD applications with hybrid programming paradigm used at JAXA. Next we propose a performance prediction formula for hybrid codes based on a simple extension of AMhhal's law, and discuss about the predicted and measured performances for some typical hybrid CFD codes.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.7
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• pp.3231-3244
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• 2016

As processor design has been transiting from homogeneous multicore processor to heterogeneous multicore processor, traditional Amdahl's law cannot meet the new challenges for asymmetric multicore system. In order to further investigate the impact factors related to the Overhead of Data Preparation (ODP) for Asymmetric multicore systems, we evaluate an asymmetric multicore system built with CPU-GPU by measuring the overheads of memory transfer, computing kernel, cache missing and synchronization. This paper demonstrates that decreasing the overhead of data preparation is a promising approach to improve the whole performance of heterogeneous system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.3
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• pp.285-291
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• 1987

Seismic waves are attenuated by losses of energy as they propagate through the earth. One way to model this numerically is to make the velocity a complex number, the real part giving the phase velocity and the imaginary part the attenuation. This models wave propagation in a medium for which the logarithmic decrement is independent of frequency(attenuation coefficient is proportional to frequncy). The aim is to modify forward and inverse numerical modeling so that attenuation can be specified as a function of position.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.8
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• pp.578-584
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• 2004

The CSVM(Current Support Vector Machine) that is a digital architecture performing all phases of recognition process including kernel computing, learning, and recall of SVM(Support Vector Machine) on a chip is proposed. Concurrent operation by parallel architecture of elements generates high speed and throughput. The classification problems of bio data having high dimension are solved fast and easily using the CSVM. Quadratic programming in original SVM learning algorithm is not suitable for hardware implementation, due to its complexity and large memory consumption. Hardware-friendly SVM learning algorithms, kernel adatron and kernel perceptron, are embedded on a chip. Experiments on fixed-point algorithm having quantization error are performed and their results are compared with floating-point algorithm. CSVM implemented on FPGA chip generates fast and accurate results on high dimensional cancer data.

• Proceedings of the Korean Information Science Society Conference
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• 2003.10a
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• pp.385-387
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• 2003

본 논문에서는 이질적인 클러스터 컴퓨팅시스템 에서 CPU와 메모리 자원을 효율적으로 사용하는 작업 부하 균등화 정책을 제안한다. 이 정책의 특징은 CPU부하 상태와 수행중인 작업의 메모리 요구량을 고려하여 작업을 동적으로 할당하는 것이다. 먼저 각 노드는 CPU와 메모리 사용량에 따라 과부하 상태가 아니면 작업을 할당받아 수행한다. 그리고 수행중인 작업의 메모리 요구량이 가용 메모리 크기를 초과하여 페이지 폴트가 발생하면 수행 중인 작업을 다른 노드로 이주시킴으로써 메모리 과부하에 따른 페이지 폴트 발생을 줄이고, 작업의 대기 시간과 수행시 간을 단축한다. 본 논문에서는 시뮬레이션을 통하여 제안한 작업부하 균등화 정책이 기존의 CPU 기반정책에 비해 시스템의 성능향상 면에서 유리함을 검증한다.

• Proceedings of the KIEE Conference
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• 2000.11b
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• pp.324-326
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• 2000

A 3D magnetostatic field is analyzed considering the non-linear characteristics of the material using finite element method. In the finite element formulation, the edge element is adopted since it reduces the required computer memory and the computing time. The modified Newton-Raphson method is also used for non-linear analysis. A numerical example with the TEAM workshop problem 13 is analyzed, and the results are proved to concide well with measured ones.