• 제목/요약/키워드: in-circuit test

검색결과 1,629건 처리시간 0.029초

Design of Data Retention Test Circuit for Large Capacity DRAMs (대용량 Dynamic RAM의 Data Retention 테스트 회로 설계)

  • 설병수;김대환;유영갑
    • Journal of the Korean Institute of Telematics and Electronics A
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    • 제30A권9호
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    • pp.59-70
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    • 1993
  • An efficient test method based on march test is presented to cover line leakage failures associated with bit and word lines or mega bit DRAM chips. A modified column march (Y-march) pattern is derived to improve fault coverage against the data retention failure. Time delay concept is introduced to develop a new column march test algorithm detecting various data retention failures. A built-in test circuit based on the column march pattern is designed and verified using logic simulation, confirming correct test operations.

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Improvement and Verification of TMFT Power Circuit Design (전술다기능단말기(TMFT)의 전원회로 설계 개선 및 검증)

  • Kim, Jin-Sung;Kim, Byung-Jun;Kim, Byung-Soo
    • The Journal of the Korea institute of electronic communication sciences
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    • 제15권2호
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    • pp.357-362
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    • 2020
  • The TMFT, a sub-system of TINC, provides voice calls, data transmission and reception, and multimedia services to individual users. At the time of development in 2011, the power circuit of the TMFT was designed to electrical power supply to each device via a charger IC. However, the newly improved power supply circuit allows power to be supplied to each device through the PMIC without configuring the charger IC separately. In this paper, the power circuit design structure of TMFT applied in the development stage and the improved power circuit design structure were compared. And we verified through experiments whether the improved power circuit can be applied to TMFT. The experimental method was verified by directly comparing the current consumption test, charge time comparison test, and rising temperature test during charging each of before and after improvement terminals.

The Study of Comparison of the Symmetrical Short Circuit Test Current with ANSI/IE Transformers. (변압기의 단락강도 시험 시 ANSI와 IEC 규격에 의한 시험 전류의 비교 연구)

  • Kim, Sun-Koo;Kim, Won-Man;La, Dae-Ryeol;Roh, Chang-Il;Lee, Dong-Jun;Jeong, Heung-Soo
    • Proceedings of the KIEE Conference
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    • 대한전기학회 2002년도 하계학술대회 논문집 B
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    • pp.694-696
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    • 2002
  • Transformers together with all equipment and accessories shall be designed and constructed to withstand the mechanical and thermal stresses produced by external short circuit which include three phase, single line-to-ground, double line-to-ground and line-to-line faults etc. Generally the Short Circuit Test of transformers is tested according to the ANSI/IEEE, IEC/JEC, KS etc, in domestic. In this study, it will be showed and compared the difference of symmetrical current for short circuit test of a Pad -mounted transformer according to with ANSI /IEEE and IEC.

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Design of a New RF Built-In Self-Test Circuit for 5.25GHz SiGe Low Noise Amplifier (5.25GHz 저잡음 증폭기를 위한 새로운 고주파 BIST 회로 설계)

  • 류지열;노석호;박세현;박세훈;이정환
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 한국해양정보통신학회 2004년도 춘계종합학술대회
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    • pp.635-641
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    • 2004
  • This paper presents a new low-cost RF Built-In Self-Test (BIST) circuit for measuring transducer voltage gain, noise figure and input impedance of 5.25GHa low noise amplifier (LNA). The BIST circuit is designed using 0.18${\mu}{\textrm}{m}$ SiGe technology. The test technique utilizes input impedance matching and output transient voltage measurements. The technique is simple and inexpensive. Total chip size has additional area of about 18% for BIST circuit.

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A Study on the Generation System Design for Fault Detect (고장 진단 생성 시스템 설계에 관한 연구)

  • 김철운
    • Journal of the Korea Society of Computer and Information
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    • 제3권2호
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    • pp.99-104
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    • 1998
  • In this paper I designed test pattern generator which will be completely detected the faults of multi-stage Logic Circuit. 1 generated this pattern using the test pattern generation Logic Circuit. The generated test patterns compared with the exhausted testing was decreased pattern. This test pattern generator will detect the all single stuck-at faults in the multi-stage Logic Circuit. The choice of which of the many I.C testing methods to use can have a effect on the success or failure of the fault detected. One of the most important considerations is cost and designed test pattern generator is very low cost type.

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Test Pattern Generation for Detection of Sutck-Open Faults in BiCMOS Circuits (BiCMOS 회로의 Stuck-Open 고장 검출을 위한테스트 패턴 생성)

  • Sin, Jae-Hong
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • 제53권1호
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    • pp.22-27
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    • 2004
  • BiCMOS circuit consist of CMOS part which constructs logic function, and bipolar part which drives output load. In BiCMOS circuits, transistor stuck-open faults exhibit delay faults in addition to sequential behavior. In this paper, proposes a method for efficiently generating test pattern which detect stuck-open in BiCMOS circuits. In proposed method, BiCMOS circuit is divided into pull-up part and pull-down part, using structural property of BiCMOS circuit, and we generate test pattern using set theory for efficiently detecting faults which occured each divided blocks.

Construction and Circuital Characteristics of Simple Synthetic Test Facility (간이 합성시험설비의 구성 및 회로특성)

  • Lee, J.H.;Park, K.Y.;Chang, K.C.;Shin, Y.J.
    • Proceedings of the KIEE Conference
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    • 대한전기학회 1995년도 하계학술대회 논문집 A
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    • pp.168-170
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    • 1995
  • This paper proposes the circuit of the simple synthetic testing facility using LC resonance circuit. The analyzed results of the circuit which can be useful for the design stage of the testing facility are also shown. EMTP has been used to analyze the circuit. Two cases of short-circuit test results obtained from the simple synthetic testing facility in KERI are shown with the waveforms of current and voltage. The results also indicate that the simple synthetic testing facility using LC resonance circuit can be easily designed and used very usefully for the research and development for the switchgears.

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The Effects of Task-Related Circuit Exercise Program Combined with Sensorimotor Training on Balance and Walking in Persons with Stroke : A pilot study (감각운동 훈련을 병행한 순환식 과제 지향 운동프로그램이 뇌졸중 환자의 보행 및 균형에 미치는 영향 : 예비연구)

  • Kim, Sunmin;Kang, Soonhee
    • Journal of The Korean Society of Integrative Medicine
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    • 제4권4호
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    • pp.21-32
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    • 2016
  • Purpose: The purpose of this study was to identify whether task-related circuit exercise program combined with sensorimotor training for 4 weeks could improve the balance and gait in stroke patients. Method: Fifteen stroke patients who had agreed with the study were randomly divided into 3 groups categorized as task-related circuit exercise program combined with sensorimotor training group (experimental group 1, n=5), task-related circuit exercise program group (experimental group 2, n=5), and control subjects performed conventional physical therapy (control group, n=5). The balance and gait were assessed by BT-4 force platform system, Berg Balance Scale, 10meter Walk Test and Smart Step at before training and after training. Wilcoxon signed rank test was used to analyze change before and after intervention in intra-group. Kruskal Wallis H test, Mann-Whitney U test and Bonfferoni correction were used to analyze changes of all variables in inter-groups. Result: The experimental group 1 showed significant improvements in postural sway area, BBS scores, walking velocity and plantar pressures of affected foot, whereas the experimental group 2 showed significant improvements in BBS scores, and the control group were no significantly different in all variables following training. The changes of postural sway area and BBS scores in the experimental group 1 were significantly greater than them of the control group. The changes of postural sway area in the experimental group 1 was significantly greater than that of the experimental group 2. Conclusion: The result of this study suggest the task-related circuit exercise program combined with sensorimotor training is an effective intervention to improve balance and gait in stoke patients.

Dynamic Characteristics Test and Test Model Establish on Double Circuit for Protective Relay Test Using Real Time Digital Simulator (송전선보호계전기 시험을 위한 RTDS센서의 2회선 송전선로 Model구축 및 동특성시험)

  • Jung, Chang-Ho;Lee, Jae-Gyu;Yoon, Nam-Seon;Ahn, Bok-Shin;Kim, Sok-Il
    • Proceedings of the KIEE Conference
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    • 대한전기학회 1997년도 하계학술대회 논문집 D
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    • pp.1038-1040
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    • 1997
  • This paper describes dynamic characteristics test of distance relay and current differential relay using Real Time Digital Simulator on double circuit transmission line. First, The double circuit T/L modeling on RTDS was proposed and the results from the proposed model were compared with those of PSS/E. This comparison shows the possibility of dynamic test using the RTDS. The relay included about 20 test items which are apt to include maloperation of protective relays in critical situations.

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Development of the Oil Consumption Rate Test Method and Measurement Data Analysis for an Automatic Transmission System (자동변속기 오일 소요유량 시험법개발 및 측정데이터 분석)

  • Jeong, H.S.;Oh, S.H.;Yi, J.S.;Lim, J.S.
    • Transactions of The Korea Fluid Power Systems Society
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    • 제6권1호
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    • pp.10-16
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    • 2009
  • Automatic power transmission systems consisted of a torque converter and several planetary gear sets, clutches and brakes are controlled by a hydraulic shift control circuit and an electronic transmission control unit. The hydraulic circuit serves for the operation of the torque converter and lubrication oil supply of the transmission system as well as for the actuation of clutches for the automatic gear shift. The complicated hydraulic control circuit constructed by many spools, solenoids, orifices and flow passages are integrated into one small valve block and it is powered by one hydraulic pump. In this paper, a test equipment was developed to measure the oil consumption of each component at various wide operating conditions. Test data about 730 sets acquired from five test items are analyzed and discussed on the oil capacity of the circuit.

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