• Title/Summary/Keyword: in-circuit test

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A New Test Generation Algorithm Using a Backtrace Fault Simulation (역추적 결함 시뮬레이션을 이용한 새로운 테스트 생성 알고리즘)

  • 권기창;백덕화;권기룡
    • KSCI Review
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    • v.2 no.1
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    • pp.121-129
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    • 1995
  • Fault simulation of logic circuits is an important part of the test-generation process. It is used for the propose of generation fault dictionaries or for the verification of the adequacy of tests. In this paper, a backtrace fault simulation is proposed to test generation. This is consists of 3 part ; initialization phase for given circuit, backtrace fault simulation phase to find fault list and reevaluation phase to list event. The main idea of this algorithm is to retain a minimum fault list by cutting uncontrollable lines of path when a logic event occurs in backward tracing phases. And the simulator is revaluates a fault list associated with the output of an element only if logic event occurs at any of its inputs when a list event occurs at one of its primary inputs. It reguires a O(n) memory space complexity. where n is a number of signal lines for the given circuits. Several examples are given to illustrate the power of this algorithm.

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Design and Fabrication of Tool Change Multi-nozzle FDM 3D Printer (툴 체인지 방식 멀티 노즐 3D프린터의 설계 및 제작)

  • Suk, Ik-hyun;Park, Jong-kyu
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.20 no.2
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    • pp.38-44
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    • 2021
  • To cater to the transition from single-color to multicolor/multi-material printing, this paper proposes a cartridge-replacing type multi-nozzle Fused Depositon Modeling(FDM) three-dimensional (3D) printer. In the test printing run, tool change failure/wobble/layer shift occurred. It was confirmed that improper support was the cause of this tool change failure. As a solution, spline and electromagnetic cartridges were designed. Wobble was caused by machine vibration and the motor stepping out. To minimize wobble, an additional Z-axis was installed, and the four-point bed leveling method was used instead of the three-point bed leveling method. The occurrence of layer shift was ascribed to the eccentricity of the Z-axis lead screw. Therefore, slit coupler was replaced with an Oldham type. In addition to the mechanical supplementation, the control environment was integrated to prevent accidents and signal errors due to wire connections. Before the final test printing run, a rectifier circuit was added to the motor to secure precise control stability. The final test printing run confirmed that the wobble/layer shift phenomenon was minimized, and the maximum error between layers was reduced to 0.05.

Study of Aging and Performance About Separation Devices Has Been Stored (장기 보관된 분리장치의 성능 및 노화에 관한 연구)

  • Kim, Dong-seong;Jin, Hong-Sik
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.49 no.7
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    • pp.565-572
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    • 2021
  • In this study, a study on the performance and aging of explosive bolts stored for a long time among pyrotechnic mechanical devices(PMD) used as separation devices in the defense field is conducted. For this, explosive bolts that had been installed in the weapon system for about 10 years are secured. Performance and life extension test procedures are established based on the AIAA Standard and MIL-STD. Before performance evaluation, non-functional tests are performed to check whether external changes or failures occurred. Next, circuit inspection and X-ray tests are conducted to check the failure in internal circuits and structures. After that, performance test is carried out to confirm the operation of the samples that passed the non-functional test. Through this test, separation of bolt and separation time are measured, and some samples are tested after a high temperature storage test to confirm the remaining life and the possibility of extension. Finally, the remaining life and reliability are predicted based on the results of the test and the Arrhenius model to identify remaining shelf life and reliability depend on time.

Experimental Study on Temperature-Moisture Combined Measurement System for Slope Failure Monitoring (사면붕괴 모니터링에 사용되는 온도-함수비 복합계측시스템 개발에 관한 실험적 연구)

  • Nam, Jin-Won
    • Journal of the Korea institute for structural maintenance and inspection
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    • v.19 no.2
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    • pp.33-39
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    • 2015
  • Recently, the event of slope failure has been occurring frequently due to rapid climate changes and broad development of infrastructures, and the research for establishment of monitoring and prevention system has been an attentive issue. The major influence factors of slope failure mechanism can be considered moisture and temperature in soil, and the slope failure can be monitored and predicted through the trend of moisture-temperature change. Therefore, the combined sensing technology for the continuous measurement of moisture-temperature with different soil depths is needed for the slope monitoring system. The various independent sensors for each item (i.e. temperature and moisture respectively) have been developed, however, the research for development of combined sensing system has been hardly carried out. In this study, the high-fidelity sensor combing temperature-moisture measurement by using the minimized current consuming temperature circuit and the microwave emission moisture sensor is developed and applied on the slope failure monitoring system. The feasibility of developed monitoring system is verified by various experimental approaches such as standard performance test, mockup test and long-term field test. As a result, the developed temperature-moisture combined measurement system is verified to be measuring and monitoring the temperature and moisture in soil accurately.

A 3.2Gb/s Clock and Data Recovery Circuit without Reference Clock for Serial Data Communication (시리얼 데이터 통신을 위한 기준 클록이 없는 3.2Gb/s 클록 데이터 복원회로)

  • Kim, Kang-Jik;Jung, Ki-Sang;Cho, Seong-Ik
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.2
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    • pp.72-77
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    • 2009
  • In this paper, a 3.2Gb/s clock and data recovery (CDR) circuit for a high-speed serial data communication without the reference clock is described This CDR circuit consists of 5 parts as Phase and frequency detector(PD and FD), multi-phase Voltage Controlled-Oscillator(VCO), Charge-pumps (CP) and external Loop-Filter(KF). It is adapted the PD and FD, which incorporates a half-rate bang-bang type oversampling PD and a half-rate FD that can improve pull-in range. The VCO consists of four fully differential delay cells with rail-to-rail current bias scheme that can increase the tuning range and tuning linearity. Each delay cell has output buffers as a full-swing generator and a duty-cycle mismatch compensation. This materialized CDR can achieve wide pull-in range without an extra reference clock and it can be also reduced chip area and power consumption effectively because there is no additional Phase Locked- Loop(PLL) for generating reference clock. The CDR circuit was designed for fabrication using 0.18um 1P6M CMOS process and total chip area excepted LF is $1{\times}1mm^2$. The pk-pk jitter of recovered clock is 26ps at 3.2Gb/s input data rate and total power consumes 63mW from 1.8V supply voltage according to simulation results. According to test result, the pk-pk jitter of recovered clock is 55ps at the same input data-rate and the reliable range of input data-rate is about from 2.4Gb/s to 3.4Gb/s.

Interfacial Adhesion and Reliability between Epoxy Resin and Polyimide for Flexible Printed Circuit Board (연성인쇄회로기판의 에폭시수지와 폴리이미드 사이의 계면접착력 및 신뢰성 평가)

  • Kim, Jeong-Kyu;Son, Kirak;Park, Young-Bae
    • Journal of the Microelectronics and Packaging Society
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    • v.24 no.1
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    • pp.75-81
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    • 2017
  • The effects of KOH pretreatment and annealing conditions on the interfacial adhesion and the reliability between epoxy resin and polyimide substrate in the flexible printed circuit board were quantitatively evaluated using $180^{\circ}$ peel test. The initial peel strength of the polyimide without the KOH treatment was 29.4 g/mm and decreased to 10.5 g/mm after 100hrs at $85^{\circ}C/85%$ R.H. temperature/humidity treatment. In case of the polyimide with annealing after KOH treatment, initial peel strength was 29.6 g/mm and then maintained around 27.5 g/mm after $85^{\circ}C/85%$ R.H. temperature/humidity treatment. Systematic X-ray photoelectron spectroscopy analysis results showed that the peel strength after optimum annealing after KOH treatment was maintained high not only due to effective recovery of the polyimide damage by the polyimide surface treatment process, but also effective removal of metallic ions and impurities during various wet process.

Implementation of ATE to Maintain Pre-Amplifier of Thermal Imaging System (열상장비 전단증폭부 정비용 ATE의 구현)

  • Park, Jai-Hyo;Kim, Han-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.49 no.1
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    • pp.80-87
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    • 2012
  • We have developed the ATE(Automatic Test Equipment) system for the performance test of pre-amplifier of thermal imaging devices. The device regenerates the electronic signals of photon detection module which is normally in weak energy, for the image signals processing. Previous ATE system was primarily and actively developed in the field of semiconductor devices quality parts inspection. Recently, it has been studied in the field of performance testing of equipment. In the field of thermal performance test equipment, however, it lacks the study of ATE compared to other areas, which causes the maintenance related to the core of military thermal imaging system maintenance to be limited. In this paper, a new study of ATE in the field of thermal imaging system is done. It is designed to be used universally for the ATE system with different types of circuit card of thermal imaging system by adopting matrix relays. Using the developed ATE measuring the pre-amplifier amplitude, an average amplified amplitude of 2.71Vpp was measured which confirms that it is within the range of theoretical analysis and also verifies the good performance of the developed ATE.

Shearing Characteristics of Sn3.0AgO.5Cu Solder Ball for Standardization of High Speed Shear Test (고속전단시험의 표준화를 위한 Sn3.0Ag0.5Cu 솔더볼의 전단특성)

  • Jung, Do-Hyun;Lee, Young-Gon;Jung, Jae-Pil
    • Journal of the Microelectronics and Packaging Society
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    • v.18 no.1
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    • pp.35-39
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    • 2011
  • Shearing characteristics of Sn-3.0wt%Ag-0.5wt%Cu ball for standardization of high speed shear test were investigated. The solder ball of 450 ${\mu}m$ in diameter was reflowed at $245^{\circ}C$ on FR4 PCB (Printed Circuit Board) to prepare a sample for the high-speed shear test. The metal pads on the PCB were OSP (Organic Solderability Preservative, Cu pad) and ENIG (Electroless Nickel/Immersion Gold, i.e CulNi/Au). Shearing speed was varied from 0.5 to 3.0 m/s, and tip height from 10 to 135 ${\mu}m$. As experimental results, for the OSP pad, a ductile fracture increased with tip height, and it decreased with shearing speed. In the case of ENIG pad, the ductile fracture increased with the tip height. The tip height of 10 ${\mu}m$ (2% of solder ball diameter) was unsuitable since the fracture mode was mostly pad lift. Shear energy increased with increasing shearing tip height from 10 to 135 ${\mu}m$ for both of OSP and ENIG pads.

Development of the Head Unit of a 300 W Cylindrical Hall Thruster for Small Satellites (소형위성용 300 W급 원통형 홀 추력기의 추력부 개발)

  • Kang, Seong-Min;Kim, Youn-Ho;Seon, Jong-Ho;Lee, Jong-Sub;Seo, Mi-Hui;Choe, Won-Ho
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.37 no.5
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    • pp.496-501
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    • 2009
  • The thruster head unit of a 300 W cylindrical Hall thruster was developed for the propulsion system of small satellites. The magnetic topology in the thruster channel is a key parameter to achieve high performances. Two types of magnetic circuit structures were designed and manufactured to compare the thrust levels and efficiencies. Also the endurance test was conducted to measure the stable operation duration of the thruster head and to find degree of erosion after extended operation.

Modeling and Prediction of Electromagnetic Immunity for Integrated Circuits

  • Pu, Bo;Kim, Taeho;Kim, SungJun;Kim, SoYoung;Nah, Wansoo
    • Journal of electromagnetic engineering and science
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    • v.13 no.1
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    • pp.54-61
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    • 2013
  • An equivalent model has been developed to estimate the electromagnetic immunity for integrated circuits under a complex electromagnetic environment. The complete model is based on the characteristics of the equipment and physical configuration of the device under test (DUT) and describes the measurement setup as well as the target integrated circuits under test, the corresponding package, and a specially designed printed circuit board. The advantage of the proposed model is that it can be applied to a SPICE-like simulator and the immunity of the integrated circuits can be easily achieved without costly and time-consuming measurements. After simulation, measurements were performed to verify the accuracy of the equivalent model for immunity prediction. The improvement of measurement accuracy due to the added effect of a bi-directional coupler in the test setup is also addressed.