• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.376-378
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• 1995

A method is presented for the design and fabrication of the temperature compensation circuits on the Clark electrodes for measuring the dissolved oxygen(DO) concentration. The discussion includes a method of the sensor interface circuits for the DO sensor. Typical polarograms for the DO probes under test using this sensor circuits are presented. High accuracy over 99 % of the I to V conversion using the proposed circuit is verified. Temperature dependence for the test DO probe is well compensated automatically using the thermistor($2k\Omega,\;25^{\circ}C$) in series with correction resistor in the feedback loop of the op-amp circuit in the temperature range of the 0-50$^{\circ}C$.

• Journal of Applied Reliability
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• v.9 no.3
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• pp.259-274
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• 2009

Printed circuit boards for RAM are widely used in modern electronics such as computers, artificial satellites and consumer durables. They are exposed to a very diverse environment and consists of many complicated components and therefore needs careful approach to the enhancement and assessment of reliability of the item. In this article reliability standards for PCBs for RAM are established in terms of quality certification tests and failure rate tests.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1069-1072
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• 1998

Recently the development of design and automation technology and manufacturing method, has reduced the cost of chip, but it becomes more difficult to test IC chip because test technique doesn't keep up with these techniques. In case of IC testing, obtaining test vectors to be able to detect good chip or bad one is very important, but according to increasing complexity, it is very complex and difficult. Another problem is that during testing, there could be capability of physical and electrical damage on chip. Also there is difficulty in synchronization between CUT (circuit under test) and Test equipment〔1〕. Because of these difficulties, built in self test has been proposed. Not only obtaining test vectors but also reducing test time becomes hot issues nowadays. This paper presents a new test BIST(built in self test) method. Proposed BIST implementation reduces test time and obtains high fault coverage. By searching internal nodes in which are inserted test_point_cells〔2〕and allocating TPG(test pattern generation) stages, test length becomes much shorter.

• The Journal of Information Technology
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• v.3 no.4
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• pp.13-21
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• 2000

The thesis is for the analysis of the current trend adapted for the method of the test information exchange in the environment of the internal circuit in case of PCB design, The design process is most powerful for improving test characteristics among the entire process of PCB. The PCB is more and more difficult to test as the processes proceed because the nodes become more and more complicated. The data exchange for improving PCB test performance should be easy in order to provide more reliable products in the shorter period. The design technology oriented for the test makes the PCB and its components tested reliably and quickly so that it can effectively improve the quality of the PCB and largely reduce the time and cost of the test development, In addition it can make the substantial standardization In improve the speed of the repeated test and treatment so that the Period of development can be shorter. Also, it helps to effectively detect the potential defects of the products, so that highly reliable PCB can be produced.

• Journal of the Earthquake Engineering Society of Korea
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• v.17 no.5
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• pp.219-225
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• 2013

This work examines the feasibility for estimating existing tensile stress on a stressed wire using the permeability of magnetic flux. A closed magnetic circuit has been constructed to induce magnetic flux inside a steel wire. With different tension stress levels on a wire, the permeability of magnetic flux on the wire has been measured. Two different experimental case studies have been conducted for the examination of sensitivity of permeability of magnetic flux on the stressed wire. One is a varying-length stress test, and the other is a fixed-length stress test. The results show that the permeability of magnetic flux in the varying-length stress test is inversely proportional to the applied stress, while the permeability in the fixed-length stress test is linearly proportional to the applied stress on the stressed wire. It is thus expected that the permeability of magnetic flux on a wire can be a promising indicator for the inspection of its tensile stress.

• Proceedings of the KSME Conference
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• 2003.04a
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• pp.1961-1965
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• 2003

The flow analysis is needed to verify the physical phenomena through interruption processes for improving the capacity and the reliability of gas circuit breakers. Moreover the small current interruption performance of GCBs could be predicted by coupling the flow characteristics with the electric field one. In this paper, the unsteady flow characteristics and the traveling trajectory are depicted with a commercial CFD code, PHOENICS, programmed for moving motion of objects. In order to validate computational results, the measured pressure data in cylinder and in front of arcing contact are compared with the test results of small current interruption.

• Proceedings of the KIEE Conference
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• 1998.07e
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• pp.1843-1845
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• 1998

Gyroscope is a very important core sensor as a rotation sensor in inertial space, in inertial guidance and navigation system on aeronautics. Plane, vessel and so on for civilian and millitary applications. Research and development of fiber optic gyroscope began in 1976 and focused on improving the gyroscope's sensitivity to rotation. bias performance and reducing noise. We have developed a Interferometric Fiber Optic' Gyroscope using a integrated-optic-circuit (IOC), which is operating with closed-loop electronic circuit. This paper describes the scheme of optical part and electronic part and also test results of this fiber optic gyroscope using a integrated-optic-circuit (IOC). The performance have been achieved as long-term bias drift of $1.73^{\circ}/h$.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.2
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• pp.38-49
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• 1997

In this paper, w describe partitioning large circuits into multiple chips on the programmable FPCB for rapid prototyping. FPCBs consists of areas for FPGAs for logic and interconnect components, and the routing topology among them are predetermined. In the partition problem for FPCBs, the number of wires ofr routing among chips is fixed, which is an additonal constraints to the conventional partition problem. In order to deal with such aconstraint properly we first define a new partition problem, so called the topologybased partition problem, and then propose a heuristic method. The heuristic method is based on the simulated annealing and clustering technique. The multi-level tree clustering technique is used to obtain faster and better prtition results. In the experimental results for several test circuits, the restrictions for FPCB were all satisfied and the needed execution time was about twice the modified K-way partition method for large circuits.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.113-116
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• 2003

Confluence buffers and single flux quantum (SFQ) switches are essential components in constructing a high speed superconductive Arithmetic Logic Unit (ALU). In this work, we developed a SFQ confluence buffer and an SFQ switch. It is very important to optimize the circuit parameters of a confluence buffer and an SFQ switch to implement them into an ALU. The confluence buffer that we are currently using has a small bias margin of $\pm$11％. By optimizing it with a Josephson circuit simulator, we improved the design of confluence buffer. Our simulation study showed that we improved bias global margin of 10％ more than the existent confluence buffer. In simulations, the minimal bias margin was $\pm$33％. We also designed, fabricated, and tested an SFQ switch operating in a DC mode. The mask layout used to fabricate the SFQ switch was obtained after circuit optimization. The test results of our SFQ switch showed that it operated correctly and had a reasonably wide margin of $\pm$15％.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.909-912
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• 1999

This paper describes realized APC and pre-equalizer circuit, and their operation principle and test results. In analog optical transmitter, constant lasing power control, free of signal clipping and linearity are important considerations. We examined pre-equalizer and APC(Automatic Power Control) circuit to improve the analog optical transmitter performance.