• Title/Summary/Keyword: in-circuit test

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Concept Design of a H.A.U.'s Subsonic Wind Tunnel (H대학교 아음속 풍동 개념설계)

  • Chang, J.W.;Jeon, C.S.;Kim, M.S.;Lee, Y.;Moon, H.J.;Song, B.H.;Kim, H.B.
    • Journal of the Korean Society for Aviation and Aeronautics
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    • v.13 no.4
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    • pp.92-99
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    • 2005
  • A closed-circuit type wind tunnel is designed, which has a test section with the dimensions $1.2(W){\times}1.2(H){\times}3.4(L)$. A subsonic wind tunnel is designed to improves educational circumstances and promote ground tests. It is constituted of an exchangeable test section, first and second diffusers, a fan, a settling chamber, a contraction, and 4 corners. The maximum velocity in the test section is 70m/s and the contraction ratio is 6.25:1. Input power in the wind tunnel is about 96.1 kw (128.8 hp) and its energy ratio is 3.89. It has the dimension of about $7.4(W){\times}3.6(H){\times}21.7m(L)$. The wind tunnel designed in this investigation will be an effective educational and investigational equipment.

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Development of a Tractor Attached Round Bale Wrapper(I) -Analysis of wrapping process and development of operating system- (트랙터 견인형 원형 베일 랩퍼의 개발(I) -랩핑 작업공정 분석 및 작업 시스템의 개발-)

  • Park, K. K.;Kim, H. J,;Kim, C. S.;Kim, J. Y.;Kim, J. H.;Jang, C.
    • Journal of Biosystems Engineering
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    • v.27 no.1
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    • pp.11-18
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    • 2002
  • One of the major obstructing factors against managing dairy farm in Korea has been a shortage of roughage supply, which resulted in excessive abuse of concentrate feed. In order to solve this problem, production of the wrap silage by the winter cereal forages raised in the fallow paddy field is strongly recommended in Korea. The main objective is to develop a tractor attached round bale wrapper which can process the silage by wrapping the round bales with thin plastic films. This is the first half of the study which is divided by two parts. In this first part, bale wrapping process was analyzed, and based on this results the followings were designed, developed and tested. 1. Bale wrapper which haying the maximum capacity of 1 ton bale with various functions such as loading, wrapping, discharging the round bales and supplying and cutting wrap films was designed. 2. An actuator and its hydraulic circuit of each process were developed and tested. 3. Also, the variations of hydraulic pressure and engine speed were investigated by operating bale wrapper developed. In this test, maximum pressure of the hydraulic circuit for the bale wrapping was 130 kg/㎠ when it raised the bale, which was quite below the relief pressure of 170 kg/㎠ of hydraulic circuit. In the engine speed test, speed drop was 20∼67 rpm, which meant that there was no over-load operation. Therefore, the experiment proved that developed hydraulic circuit and mechanism is stable in bale wrapping operation

Thermal Analysis using Thermal Equivalent Circuit Analysis and Finite Element Method of In-wheel Motor (In-wheel 전동기의 열 등가회로 해석 및 유한요소해법을 이용한 열해석)

  • Kim, Kyu-Seob;Lee, Byeong-Hwa;Hong, Jung-Pyo;Nam, Hyuk
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.941-942
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    • 2011
  • A thermal equivalent circuit of IPMSM considering eddy current loss of PM and core loss of rotor is proposed. This thermal equivalent model is represented by the thermal resistances and thermal capacitances. In order to determine the factor of each parameter, a heating test is processed. Additionally, the eddy current loss of PM is calculated by a transient 3D finite element analysis. Finally, this thermal equivalent model is verified by a temperature test in a 25kW 12-pole/18-slot IPMSM with varying load.

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Modeling of High-speed 3-Disional Embedded Inductors (고속 3차원 매립 인덕터에 대한 모델링)

  • 이서구;최종성;윤일구
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.139-142
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    • 2001
  • As microeletronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important for many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (5-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

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An Experimental Study on the Failure Characteristics of Flip Chips in Cyclic Bending Test (플립칩의 반복 굽힘 시험 시 파손 특성에 관한 실험적 연구)

  • Lee, Yong-Sung;Jeong, Jong-Seol;Kim, Hong-Seok;Shin, Ki-Hoon
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.18 no.4
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    • pp.362-368
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    • 2009
  • In general, circuit board assemblies experience various mechanical loadings during assembly and in actual use. The repeated cyclic bending can cause electrical failures due to circuit board cracks, solder interconnects cracks, and the component cracks. In this paper, we report on the failure characteristics of semiconductor chips under the repeated cyclic bending. We first describe a new 4-point bending tester, which is developed according to JEDEC standard No. 22B113. The performance of the tester is then estimated through actual experiments. Test results reveal that the cracks first occur on the outer balls around 20,000 cycles and gradually propagate to the inner balls where cracks are found around 70,000 cycles.

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A Design of BICS Circuit for IDDQ Testing of Memories (메모리의 IDDQ 테스트를 위한 내장전류감지 회로의 설계)

  • 문홍진;배성환
    • The Journal of the Acoustical Society of Korea
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    • v.18 no.3
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    • pp.43-48
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    • 1999
  • IDDQ testing is one of current testing methodologies which increases circuit's reliability by means of finding defects which can't be detected by functional testing in CMOS circuits. In this paper, we design a Built-In Current Sensor(BICS) circuit, which can be embedded in chip under test, that performs IDDQ testing. Furthermore, it is designed for IDDQ testing of memories and implemented to carry out testing at high-speed by using small number of transistors.

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Equivalent Circuit Model of Glucose Kinetics (생체내 포도당 동태의 등가회로모델)

  • Yun, Jang-H.;Kim, Min-Chong
    • Journal of Biomedical Engineering Research
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    • v.2 no.1
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    • pp.31-38
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    • 1981
  • The objective of the present study was to develop an equivalent circuit model of glucose kinetics including the hepatic glucose balance functions which were neglected in the previous compartmental models. Using this circuit model, the insulin resistivity parameter and hepatic glucose sensitivity parameter were estimated in optimal fitting of the model based data of glucose and insulin concentration to the reported clinical intravenous glucose tolerance test(IVGTT) data in normal and diabetic subjects. The addition of the hepatic function in the model has improved the overall performance of the simulation. Also, the computed tissue insulin resistivity and the hepatic glucose sensitivity are shown to be significant in distinguishin four clinical groups of normal and diabetic groups.

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Incorporating Station Related Aging Failures in Bulk System Reliability Analysis

  • Billinton Roy;Yang Hua
    • KIEE International Transactions on Power Engineering
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    • v.5A no.4
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    • pp.322-330
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    • 2005
  • This paper proposes methods to incorporate station related aging failures in composite system reliability assessment. Aging failures of station components, such as circuit breakers and bus bars, are a major concern in composite power system planning and operation as an increasing number of station components approach the wear-out phase. This paper presents probabilistic models for circuit breakers involving aging failures and relevant evaluation techniques to examine the effects of station related aging outages. The technique developed to incorporate station related aging failures are illustrated by application to a small composite test system. The paper illustrates the effects of circuit breaker aging outages on bulk system reliability evaluation and examines the relative effects of variations in component age. System sensitivity analysis is illustrated by varying selected component parameters. The results show the implications of including component aging failure considerations in the overall analysis of a composite system.

Copper thickness and thermal reliability of microvias produced by laser-assisted seeding (LAS) process in printed circuit board (PCB) manufacture

  • Leung, E. S.W.;Yung, W. K.C.
    • International Journal of Quality Innovation
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    • v.2 no.2
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    • pp.69-92
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    • 2001
  • The laser-assisted seeding (LAS) process has potential to replace conventional electroless copper plating in Printed Circuit Board (PCB) manufacturing since it combines the steps of laser drilling and plating into one single process. In the LAS process, the single extra LAS step can metallize a microvia. Thus, the process steps can be greatly reduced and the productivity enhanced, but also the high aspect ratio microvias can be metallized. The objectives of this paper are to study the LAS copper thickness within PCB microvias and the thermal reliability of the microvias produced by this process. It was found that results were satisfactory in both the reliability test and also the LAS copper thickness which both comply with IPC standard, the copper thickness produced by the LAS process is sufficient for subsequent electro-plating process. The reliability of the microvias produced by LAS process is acceptable which are free from any voids, corner cracks, and distortion in the plated copper.

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Development of Program counter through the optimization of RSFQ Toggle Flip-Flop (RSFQ Toggle Flip-Flop 회로의 최적화를 통한 Program Counter의 개발)

  • Baek Seung Hun;Kim Jin Young;Kim Se Hoon;Kang Joon Hee
    • Progress in Superconductivity and Cryogenics
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    • v.7 no.1
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    • pp.17-20
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    • 2005
  • We has designed, fabricated, and measured a Single flux quantum (SFQ) toggle flip-flop (TFF). The TFF is widely used in superconductive digital electronics circuits. Many digital devices, such as frequency counter, counting ADC and program counter be used TFF Specially, a program counter may be constructed based on TFF We have designed the newly TFF and obtained high bias margins on test. In this work, we used two circuit simulation tools, WRspice and Julia, as circuit optimization tools. We used XIC for a layout tool. Newly designed TFF had minimum bias margins of +/- $37\%$ and maximum bias margins of +/-$37\%$(enhanced from +/- $37\%$). The designed circuits were fabricated by using Nb technology The test results showed that the re-optimized TFF operated correctly on 100kHz and had a very wide bias margins of +/- $53\%$.