• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.4
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• pp.316-324
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• 2010

In this paper, we design a 256 kbits EEPROM for a MCU (Microcontroller unit) with the wide voltage range of 1.8 V to 5.5 V. The memory space of the EEPROM is separated into a program and data region. An option memory region is added for storing user IDs, serial numbers and so forth. By making HPWs (High-voltage P-wells) of EEPROM cell arrays with the same bias voltages in accordance with the operation modes shared in a double word unit, we can reduce the HPW-to-HPW space by a half and hence the area of the EEPROM cell arrays by 9.1 percent. Also, we propose a page buffer circuit reducing a test time, and a write-verify-read mode securing a reliability of the EEPROM. Furthermore, we propose a DC-DC converter that can be applied to a MCU with the wide voltage range. Finally, we come up with a method of obtaining the oscillation period of a charge pump. The layout size of the designed 256 kbits EEPROM IP with MagnaChip's 0.18 ${\mu}m$ EEPROM process is $1581.55{\mu}m{\times}792.00{\mu}m$.

• Transactions of Materials Processing
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• v.19 no.3
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• pp.167-172
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• 2010

Roll-to-roll forming process is one of important metal processing technology because the process is simple and economical. These days, with these merits, roll-to-roll forming process is tried to be employed in manufacturing the circuit board, barrier ribs and solar cell plate. However, it is difficult to apply to the forming of micro scale or sub-micro scale pattern. In this study, the roll forming processing for the micro scale is designed and analyzed. The forming of micro pattern for small electric device such as LCD panel by incremental roll forming process is analyzed. Firstly, the optimum analysis conditions are found by several analyses. And then, formability is analyzed for various protrusion shapes at various forming temperatures. The formability is evaluated in terms of filling ratio and damage value. The filling ratio is defined from the tool geometry and critical damage is determined from the analysis of uniaxial tensile test. Finally, optimum forming conditions that guarantee the successful forming are found.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.8
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• pp.1700-1704
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• 2004

In this paper a novel power converter for some notches generation in the point of common coupling is described. The magnitude, width, polarity, and position of the notches generated by the proposed scheme can be varied arbitrary with simple control. The scheme has good features of simple structure, high reliability, low cost, high efficiency, and the capability of arbitrary several notches generation. The converter can be used for the test of custom power devices such as UPS, DVR, active power filter, etc. The circuit operation is described and the usefulness of the scheme is verified through simulations.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1255-1267
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• 2018

Parasitic parameters have a larger influence on Silicon Carbide (SiC) devices with an increase of the switching frequency. This limits full utilization of the performance advantages of the low switching losses in high frequency applications. By combining a theoretical analysis with a experimental parametric study, a mathematic model considering the parasitic inductance and parasitic capacitance is developed for the basic switching circuit of a SiC MOSFET. The main factors affecting the switching characteristics are explored. Moreover, a fast-switching double pulse test platform is built to measure the individual influences of each parasitic parameters on the switching characteristics. In addition, guidelines are revealed through experimental results. Due to the limits of the practical layout in the high-speed switching circuits of SiC devices, the matching relations are developed and an optimized layout design method for the parasitic inductance is proposed under a constant length of the switching loop. The design criteria are concluded based on the impact of the parasitic parameters. This provides guidelines for layout design considerations of SiC-based high-speed switching circuits.

• Transactions of the Korean Society of Automotive Engineers
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• v.11 no.3
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• pp.92-98
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• 2003

An LPG engine for heavy-duty vehicles has been developed using liquid phase LPG injection (hereafter LPLi) system which has regarded as one of the next generation LPG fuel supply systems. In this wort to investigate the lean bum characteristics of heavy-duty LPLi engine, various injection timing (SOI, start of injection) and double ignition method were tested. The results showed that lean misfire limit of LPLi engine could be extended. by 0.2 $\lambda$ value, using the optimal SOI timing in LPLi system. Double ignition method test was carried out by installing the second spark plug and modified ignition circuit to ignite two spark plugs simultaneously. Double ignition resulted in the stable combustion under ultra lean bum condition, below $\lambda=1.7$, and extension of lean misfire limit compare to ordinary case. Therefore, LPLi engine with optimal SOI and double ignition method could be normally operated at around $\lambda=1.9$ and showed higher engine performance.

• Journal of Biosystems Engineering
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• v.14 no.2
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• pp.80-84
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• 1989

In order to improve the combustion efficiency of the agricultural engine, an ignition timing control system was developed and tested. The control system was composed of the CDI ignition circuit, the microcomputer and the interfacing devices. In this study, the simplicity of the control system and the flexibility of the control strategy were emphasized for the precision, the applicability and the economical efficiency. The hardware was consisted in almost the same compositions as those of the automobile engine. The softwares of the control algorithms were developed to three types depending on the combination of the quasi-adaptive control and the open loop control which had the different spark advance equations according to the input variables such as engine speed, exhaust gas temperature and brake torque. The test results were summarized as follows: 1. By using the computer control system, the fuel consumption efficiency could be improved and the fuel consumption could be reduced by 0 to 57% compared to that of the fixed spark advance system. 2. The fuel consumption of the control mode with the quasi-adaptive algorithm was reduced by average 0.8% compared to that of the control mode without quasi-adaptive algorithm. 3. It was found that the control mode with the quasi-adaptive algorithm adopting single input of engine speed had most applicability and economical efficiency among three types of the control algorithms.

• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.266-267
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• 2006

A coupling capacitor voltage transformer (CCVT) is used in extra high voltage and ultra high voltage transmission systems to obtain the standard low voltage signal for protection and measurement. To obtain the high accuracy at the power system frequency, a tuning reactor is connected between a capacitor and a voltage transformer (VT). Thus, no distortion of the secondary voltage is generated when no fault occurs. However, when a fault occurs, the secondary voltage of the CCVT has some errors due to the transient components resulting from the fault. This paper proposes an algorithm for compensating the secondary voltage of the CCVT in the time domain. With the values of the secondary voltage of the CCVT, the secondary and the primary currents are obtained; then the voltage across the capacitor and the tuning reactoris calculated and then added to the measured secondary voltage. The proposed algorithm includes the effect of the non-linear characteristic of the VT and the influence of the ferro-resonance suppression circuit. Test results indicate that the algorithm can successfully compensate the distorted secondary voltage of the CCVT irrespective of the fault distance, the fault inception angle and the fault impedance.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2597-2600
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• 1999

Semiconductor devices can be series stacked for the application of high voltage switching. It can provide high reliability and long lifetime by the safe design with a reasonable margin. The equal voltage distribution at solid-state switches in series should be guaranteed. Static and dynamic voltage division, over current protection must be considered carefully in the design stage. A fast switching thyristor is a good candidate for the high power pulse applications. A high voltage switching module is designed and tested. Its specifications are working voltage of 70 kV, switching pulse width of 120${\mu}s$, peak switching current of 220A, maximum repetition rate of 200pps. The module can be series connected to get higher working voltage. This paper presents the design details and the test results are compared with expected circuit simulations.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.5
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• pp.939-944
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• 2010

A high voltage air-cored helical strip/wire type pulse transformer has been fabricated for charging of a high voltage pulse forming line. As a primary coil, copper strip of 25mm width was wound helically around a MC nylon cylinder. For a secondary coil, copper enameled wire of 1mm diameter was wound around conical cylinder in order to provide insulation between two windings. The coupling coefficient of 0.53 was obtained when two coils were combined coaxially in the insulation oil filled chamber. Voltage gain and energy transfer efficiency were investigated by varying the parameters of primary and secondary circuit. Test results shows that the voltage gain increases up to 17 with increasing the primary capacitance up to 200nF. And highest energy transfer efficiency of 44% was obtained when the dual resonant operation condition was nearly satisfied. The pulse transformer developed in this study can be used for charging the middle conductor of a Blumlein pulse forming line.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.2
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• pp.71-76
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• 2016

A controller area network (CAN) receiver measures differential voltage on a bus to determine the bus level. Since 3.3V transceivers generate the same differential voltage as 5V transceivers (usually ${\geq}1.5V$), all transceivers on the bus (regardless of supply voltage) can decipher the message. In fact, the other transceivers cannot even determine or show that there is anything different about the differential voltage levels. A new CMOS RC oscillator insensitive supply voltage for clock generation in a CAN transceiver was fabricated and tested to compensate for this drawback in CAN communication. The system consists of a symmetrical circuit for voltage and current switches, two capacitors, two comparators, and an RS flip-flop. The operational principle is similar to a bistable multivibrator but the oscillation frequency can also be controlled via a bias current and reference voltage. The chip test experimental results show that oscillation frequency and power dissipation are 500 kHz and 5.48 mW, respectively at a supply voltage of 3.3 V. The chip, chip area is $0.021mm^2$, is fabricated with $0.18{\mu}m$ CMOS technology from SK hynix.