• Title/Summary/Keyword: implementation algorithm

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A VLSI Efficient Design and Implementation of Bit Plane Coding Algorithm for JPEG2000 (JPEG2000을 위한 Bit Plane Coding Algorithm의 효율적인 VLSI 설계 및 구현)

  • Yang, Sang-Hoon;Min, Byung-Jun;Park, Dong-Sun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.1
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    • pp.146-150
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    • 2009
  • Nowdays needs the new still image compression standard. JPEG2000 has been developed. JPEG2000 divide DWT and EBCOT. EBCOT is consisted of Bit Plane Coding and ARithmetic Coding algorithm. In this paper, we proposed BPC algorithm that is efficient context-based generation. Proposed BPC Algorithm forecasted coding pass using SigStage, column, mpass value. BPC designed using Verilog HDL. H/W implemenates using Xillinx FPGA technology.

Path planning on satellite images for unmanned surface vehicles

  • Yang, Joe-Ming;Tseng, Chien-Ming;Tseng, P.S.
    • International Journal of Naval Architecture and Ocean Engineering
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    • v.7 no.1
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    • pp.87-99
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    • 2015
  • In recent years, the development of autonomous surface vehicles has been a field of increasing research interest. There are two major areas in this field: control theory and path planning. This study focuses on path planning, and two objectives are discussed: path planning for Unmanned Surface Vehicles (USVs) and implementation of path planning in a real map. In this paper, satellite thermal images are converted into binary images which are used as the maps for the Finite Angle $A^*$ algorithm ($FAA^*$), an advanced $A^*$ algorithm that is used to determine safer and suboptimal paths for USVs. To plan a collision-free path, the algorithm proposed in this article considers the dimensions of surface vehicles. Furthermore, the turning ability of a surface vehicle is also considered, and a constraint condition is introduced to improve the quality of the path planning algorithm, which makes the traveled path smoother. This study also shows a path planning experiment performed on a real satellite thermal image, and the path planning results can be used by an USV.

Control Algorithm for Virtual Machine-Level Fairness in Virtualized Cloud Data center (가상화 클라우드 데이터센터에서 가상 머신 간의 균등한 성능 보장을 위한 제어 알고리즘)

  • Kim, Hwantae;Kim, Hwangnam
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38C no.6
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    • pp.512-520
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    • 2013
  • In this paper, the control algorithm which can resolve the unfairness in network performance of the virtual machine arised from the CPU scheduling in cloud datacenter has been proposed. We first describe the evaluation and analysis results of the network unfairness phenomenon of virtual machine through the heterogeneous cloud datacenter testbed and we propose the control algorithm which can guarantee the fairness of the network performance based on the PID control scheme. Through the implementation and evaluation results, we verify the performance of the proposed algorithm.

An Implementation of the Real-time Image Stitching Algorithm Based on ROI (ROI 기반 실시간 이미지 정합 알고리즘 구현)

  • Kwak, Jae Chang
    • Journal of IKEEE
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    • v.19 no.4
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    • pp.460-464
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    • 2015
  • This paper proposes a panoramic image stitching that operates in real time at the embedded environment by applying ROI and PROSAC algorithm. The conventional panoramic image stitching applies SURF or SIFT algorithm which contains complicated operations and a lots of data, at the overall image to detect feature points. Also it applies RANSAC algorithm to remove outliers, so that an additional verification time is required due to its randomness. In this paper, unnecessary data are eliminated by setting ROI based on the characteristics of panorama images, and PROSAC algorithm is applied for removing outliers to reduce verification time. The proposed method was implemented on the ORDROID-XU board with ARM Cortex-A15. The result shows an improvement of about 54% in the processing time compared to the conventional method.

A Study on the Design of Echo-Canceller using SIA(Stochastic Iteration Algorithm) (SIA(Stochastic Iteration Algorithm)을 이용한 반향제거기 설계에 관한 연구)

  • Cho, Hyon-Mook;Kim, Sang-Hoon;Park, Nho-Kyung;Moon, Dai-Tchul;Tchah, Kyun-Hyon
    • The Journal of the Acoustical Society of Korea
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    • v.13 no.2
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    • pp.38-49
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    • 1994
  • This paper proposes Echo canceller used in simultaneous two-way ('full-duplex') transmission of data signals over two-wire circuits which can be achieved by using a hybrid coupler. This Echo canceller uses sequential processing instead of parallel processing with conventional adaptive digital filter. This structure reduces the number of multipliers. Thus, this structure is much more suitable for IC implementation. This Echo canceller operates according to the 'Stochastic Iteration Algorithm(SIA).' SIA algorithm has merit of good performance and small hardware requirement.

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A Study on the Efficient Occlusion Culling Using Z-Buffer and Simplified Model (Z-Buffer와 간략화된 모델을 이용한 효율적인 가려지는 물체 제거 기법(Occlusion Culling)에 관한 연구)

  • 정성준;이규열;최항순;성우제;조두연
    • Korean Journal of Computational Design and Engineering
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    • v.8 no.2
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    • pp.65-74
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    • 2003
  • For virtual reality, virtual manufacturing system, or simulation based design, we need to visualize very large and complex 3D models which are comprising of very large number of polygons. To overcome the limited hardware performance and to attain smooth realtime visualization, there have been many researches about algorithms which reduce the number of polygons to be processed by graphics hardware. One of these algorithms, occlusion culling is a method of rejecting the objects which are not visible because they are occluded by other objects, and then passing only the visible objects to graphics hardware. Existing occlusion culling algorithms have some shortcomings such as the required long preprocessing time, the limitation of occluder shape, or the need for special hardware implementation. In this study, an efficient occlusion culling algorithm is proposed. The proposed algorithm reads and analyzes Z-buffer of graphics hardware using Microsoft DirectX, and then determines each object's visibility. This proposed algorithm can speed up visualization by reading Z-buffer using DirectX which can access hardware directly compared to OpenGL, by reading only the region to which each object is projected instead of reading the whole Z-Buffer, and the proposed algorithm can perform more exact visibility test by using simplified model instead of using bounding box. For evaluation, the proposed algorithm was applied to very large polygonal models. And smooth realtime visualization was attained.

Implementation of Genetic Algorithm Processor based on Hardware Optimization for Evolvable Hardware (진화형 하드웨어를 위한 하드웨어 최적화된 유전자 알고리즘 프로세서의 구현)

  • Kim, Jin-Jeong;Jeong, Deok-Jin
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.49 no.3
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    • pp.133-144
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    • 2000
  • Genetic Algorithm(GA) has been known as a method of solving large-scaled optimization problems with complex constraints in various applications. Since a major drawback of the GA is that it needs a long computation time, the hardware implementations of Genetic Algorithm Processors(GAP) are focused on in recent studies. In this paper, a hardware-oriented GA was proposed in order to save the hardware resources and to reduce the execution time of GAP. Based on steady-state model among continuos generation model, the proposed GA used modified tournament selection, as well as special survival condition, with replaced whenever the offspring's fitness is better than worse-fit parent's. The proposed algorithm shows more than 30% in convergence speed over the conventional algorithm in simulation. Finally, by employing the efficient pipeline parallelization and handshaking protocol in proposed GAP, above 30% of the computation speed-up can be achieved over survival-based GA which runs one million crossovers per second (1㎒), when device speed and size of application are taken into account on prototype. It would be used for high speed processing such of central processor of evolvable hardware, robot control and many optimization problems.

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Statistics based localized damage detection using vibration response

  • Dorvash, Siavash;Pakzad, Shamim N.;LaCrosse, Elizabeth L.
    • Smart Structures and Systems
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    • v.14 no.2
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    • pp.85-104
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    • 2014
  • Damage detection is a challenging, complex, and at the same time very important research topic in civil engineering. Identifying the location and severity of damage in a structure, as well as the global effects of local damage on the performance of the structure are fundamental elements of damage detection algorithms. Local damage detection is essential for structural health monitoring since local damages can propagate and become detrimental to the functionality of the entire structure. Existing studies present several methods which utilize sensor data, and track global changes in the structure. The challenging issue for these methods is to be sensitive enough in identifYing local damage. Autoregressive models with exogenous terms (ARX) are a popular class of modeling approaches which are the basis for a large group of local damage detection algorithms. This study presents an algorithm, called Influence-based Damage Detection Algorithm (IDDA), which is developed for identification of local damage based on regression of the vibration responses. The formulation of the algorithm and the post-processing statistical framework is presented and its performance is validated through implementation on an experimental beam-column connection which is instrumented by dense-clustered wired and wireless sensor networks. While implementing the algorithm, two different sensor networks with different sensing qualities are utilized and the results are compared. Based on the comparison of the results, the effect of sensor noise on the performance of the proposed algorithm is observed and discussed in this paper.

Implementation and Performance Evaluation of Digital Flickermeter Algorithm According to IEC61000-4-15 Edition 2 for Korean Distribution Power System (국내 계통 특성을 고려한 IEC61000-4-15 Edition 2 기반의 디지털 플리커 미터 알고리즘 구현 및 평가)

  • Shin, Hoon-Chul;Han, Su-Kyoung;Park, Sang-Ho;Kim, Kern-Joong;Cho, Soo-Hwan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.7
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    • pp.1017-1024
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    • 2017
  • The International Electrotechnical Commission(IEC) 61000-4-15 is a standard proposing techniques for a flicker meter test and measurement method. The IEC61000-4-15 ed1 announced in 1997 was not include tests for accurate verification. Also it was not explained flicker meter algorithm that can be directly applied to the other power systems. But the new edition of IEC61000-4-15 ed2 prescribes a variety of tests for verify flicker meter algorithm and it explains 'correction factor' used for measuring flicker in other power systems. It can measure flicker severity in 220V system by multiplying correction factor to the measured values with the 230V algorithm. This paper compared the method of measuring flicker severity in korea power system using the correction factor and the modified weighting filter, after verifying of digital flicker meter algorithm created by using matlab based on IEC61000-4-15 ed2.

Integrated SIFT Algorithm with Feature Point Matching Filter for Relative Position Estimation (특징점 정합 필터 결합 SIFT를 이용한 상대 위치 추정)

  • Gwak, Min-Gyu;Sung, Sang-Kyung;Yun, Suk-Chang;Won, Dae-Hee;Lee, Young-Jae
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.37 no.8
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    • pp.759-766
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    • 2009
  • The purpose of this paper is an image processing algorithm development as a base research achieving performance enhancement of integrated navigation system. We used the SIFT (Scale Invariant Feature Transform) algorithm for image processing, and developed feature point matching filter for rejecting mismatched points. By applying the proposed algorithm, it is obtained better result than other methods of parameter tuning and KLT based feature point tracking. For further study, integration with INS and algorithm optimization for the real-time implementation are under investigation.