• Title/Summary/Keyword: implementation algorithm

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Implementation of UPC algorithm in ATM network (ATM망에서의 UPC 알고리즘 구현)

  • 이요섭;조태경;최명렬
    • Proceedings of the Korean Information Science Society Conference
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    • 2002.10e
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    • pp.88-90
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    • 2002
  • 본 논문에서는 ATM 망의 트래픽 제어 기능 중의 하나인 UPC(Usage Parameter Control) 알고리즘을 제안하고 VHDL을 이용하여 칩(chip)을 구현하였다. 제안한 알고리즘은 우선순위가 높은 셀의 손실을 최소로 하고, 트래픽의 다중화 및 역다중화 과정에서 발생되는 트래픽의 군집성을 해소할 수 있다는 장점을 갖고 있다. 구현한 칩은 입력 모듈과 UPC 모듈, 출력 모듈의 3부분으로 이루어지며, 편의상, UPC 모듈에서는 커넥션 테이블의 index를 VCI(Virtual channel Identifier)와 동일하게 할당하였다. 또한 UPC 모듈의VSA(Virtual Scheduling Algorithm)블럭에서 셀의 도착시간을 계수하는 카운터가 랩-어라운드(wrap-around)할 때 생기는 VSA의 오류를 보정하여 구현하였다.

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Implementation of a ZVT-PRT Current Controlled Inverters using a Digital Signal Processor (DSP를 이용한 ZVT-PRT 전류제어형 인버터의 구현)

  • 이성룡;전칠환;김상수
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.11a
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    • pp.425-429
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    • 2002
  • In this paper, a single-phase inverter using a diode bridge-type resonant circuit to implement ZVT(Zero Voltage Transition) switching is presented. The current control algorithm is analyzed about how to design the circuit with auxiliary switch which can ZVT operation for the main power switch. The simulation and experimental results would be shown to verify the proposed current algorithm, because the main power switch is turn on with ZVT and the hi-directional inverter is operated.

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A hardware implementation of neural network with modified HANNIBAL architecture (수정된 하니발 구조를 이용한 신경회로망의 하드웨어 구현)

  • 이범엽;정덕진
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.45 no.3
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    • pp.444-450
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    • 1996
  • A digital hardware architecture for artificial neural network with learning capability is described in this paper. It is a modified hardware architecture known as HANNIBAL(Hardware Architecture for Neural Networks Implementing Back propagation Algorithm Learning). For implementing an efficient neural network hardware, we analyzed various type of multiplier which is major function block of neuro-processor cell. With this result, we design a efficient digital neural network hardware using serial/parallel multiplier, and test the operation. We also analyze the hardware efficiency with logic level simulation. (author). refs., figs., tabs.

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Implementation of the Arrangement Algorithm for Autonomous Mobile Robots (자율 이동 로봇의 정렬 군지능 알고리즘 구현)

  • Kim, Jang-Hyun;Kong, Seong-Gon
    • Proceedings of the KIEE Conference
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    • 1998.07g
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    • pp.2186-2188
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    • 1998
  • In this paper, Fundamental rules governing group intelligence "arrangement" behavior of multiple number of autonomous mobile robots are represented by a small number of fuzzy rules. Complex lifelike behavior is considered as local interactions between simple individuals under small number of fundamental rules. The fuzzy rules for arrangement are generated from clustering the input-output data obtained from the arrangement algorithm. Simulation shows the fuzzy rules successfully realizes fundamental rules of the flocking group behavior.

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An Implementation of Efficient OTC(Over-The-Cell) Channel Router (효과적인 OTC 채널 라우터의 구현)

  • Jang, Seung-Kew;Chang, Hoon
    • Proceedings of the KIEE Conference
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    • 1998.11b
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    • pp.591-593
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    • 1998
  • As evolution of the process technology, we proposed the Over-The-Cell channel routing algorithm for the advanced three-layer process. The proposed algorithm simplifies the channel routing problem, and then makes use of Simulated Annealing Technique to converge at global optimal solution. Also, we proposed a new method to remove the cyclic vertical constraints which are known to be the hardest element in the channel routing problem and a way to detect the local minimal solution and escape from it successfully.

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Verification of the On-Board Control Algorithm (I) (차상 제어 시스템의 알고리즘 검증 (I))

  • 전정우;이재덕;이주훈;박도영;김용주
    • Proceedings of the KSR Conference
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    • 2000.05a
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    • pp.292-299
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    • 2000
  • An OBCS(on-board control system) which controls an operation of high speed train is a distributed control system which centrally supervises and controls a distributed system if independent units. A complicated process of design, implementation and test is needed to develop this system. The OBCS and its control algorithm are designed and verified by using the CASE Tool before it is implemented. Its functions are verified by the OBCS simulator. Hereafter, this verification process for Korean high-speed train being developed is presented.

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A Study on The design of Accelerator of The Outlined Font Generation (고해상도 윤곽선 문자 발생가속기 설계에 대한 연구)

  • Seo, Ju-Ha;Ahn, Tae-Young
    • Journal of Industrial Technology
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    • v.11
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    • pp.55-63
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    • 1991
  • This paper presents a design of the accelerate circuit for the conversion of the vector font data into the bit-mapped image. Among the Bezier curve algorithm, the subdivision algorithm gives the good performance and easy hardware implementation. The sequencer is realized by the proprammable gate array and the processing unit is composed of EPLDs and TTL ICs.

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Implementation of the Obstacle Avoidance Algorithm of Autonomous Mobile Robots by Clustering (클러스터링에 의한 자율 이동 로봇의 장애물 회피 알고리즘)

  • 김장현;공성곤
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1998.10a
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    • pp.504-510
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    • 1998
  • In this paper, Fundamental rules governing group intelligence "obstacle avoidance" behavior of multiple autonomous mobile robots are represented by a small number of fuzzy rules. Complex lifelike behavior is considered as local interactions between simple individuals under small number of fundamental rules. The fuzzy rules for obstacle avoidance are generated from clustering the input-output data obtained from the obstacle avoidance algorithm. Simulation shows the fuzzy rules successfully realizes fundamental rules of the obstacle avoidance behavior.

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Kernel Adatron Algorithm for Supprot Vector Regression

  • Kyungha Seok;Changha Hwang
    • Communications for Statistical Applications and Methods
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    • v.6 no.3
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    • pp.843-848
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    • 1999
  • Support vector machine(SVM) is a new and very promising classification and regression technique developed by Bapnik and his group at AT&T Bell laboratories. However it has failed to establish itself as common machine learning tool. This is partly due to the fact that SVM is not easy to implement and its standard implementation requires the optimization package for quadratic programming. In this paper we present simple iterative Kernl Adatron algorithm for nonparametric regression which is easy to implement and guaranteed to converge to the optimal solution and compare it with neural networks and projection pursuit regression.

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Implementation of A Set-based POI Search Algorithm Supporting Classifying Duplicate Characters (중복글자 구분을 지원하는 집합 기반 POI 검색 알고리즘 구현)

  • Ko, Eunbyul;Lee, Jongwoo
    • Journal of Digital Contents Society
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    • v.14 no.4
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    • pp.463-469
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    • 2013
  • The set-based POI search algorithm showed better performance than the existing hard matching search when inaccurate queries are entered. In the set-based POI search algorithm, however, there is a problem that can't classify duplicate characters within a record. This is due to it's 'set-based' search property. To solve this problem, we improve the existing set-based POI search algorithm. In this paper, we propose and implement an improved set-based POI search algorithm that is able to deal duplicate characters properly. From the experimental results, we can find that our technique for duplicate characters improves the performance of the existing set based POI search algorithm.