• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.486-489
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• 2010

This paper describes a layered LDPC decoder which supports block length of 1,944 bits and code rate 1/2 for IEEE 802.11n WLAN standard. To reduce the hardware complexity, the min-sum algorithm and layered architecture is adopted. A novel memory reduction technique suitable for min-sum algorithm reduces memory size by 75% compared with conventional method. The designed processor has 200,400 gates and 19,400 bits memory, and it is verified by FPGA implementation. The estimated throughput is about 200 Mbps at 120 MHz clock by using Xilinx Virtex-4 FPGA device.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.8A
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• pp.814-821
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• 2002

The SPIHT(set partitioning in hierarchical tree) is efficient and well-known in the zerotree coding algorithm. However SPIHT's high memory requirement is a major difficulty for hardware implementation. In this paper we propose low-memory and fast zerotree algorithm. We present following three methods for reduced memory and fst coding speed. First, wavelet transform by lifting has a low memory requirement and reduced complexity than traditional filter bank implementation. The second method is to divide the wavelet coefficients into a block. Finally, we use NLS algorithm proposed by Wheeler and Pearlman in our codec. Performance of NLS is nearly same as SPIHT and reveals low and fixed memory and fast coding speed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.285-287
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• 2014

This paper describes a design of area-efficient/low-power cryptographic processor for lightweight block cipher algorithm HIGHT which was approved as a cryptographic standard by KATS and ISO/IEC. The HIGHT algorithm which is suitable for the security of IoT(Internet of Things), encrypts a 64-bit plain text with a 128-bit cipher key to make a 64-bit cipher text, and vice versa. For area-efficient and low-power implementation, we adopt 32-bit data path and optimize round transform block and key scheduler to share hardware resources for encryption and decryption.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2001.11a
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• pp.197-197
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• 2001

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2001.11a
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• pp.115-115
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• 2001

• 한국기계연구소 소보
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• s.16
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• pp.63-68
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• 1986

• Proceedings of the Korean Nuclear Society Conference
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• 2005.10a
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• pp.830-831
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• 2005

• Structural Engineering and Mechanics
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• v.25 no.2
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• pp.239-268
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• 2007

This paper deals with optimal stacking sequence design of laminate composite structures. The stacking sequence optimisation of laminate composites is formulated as a combinatorial problem and is solved using Simulated Annealing (SA), an algorithm devised based on inspiration of physical process of annealing of solids. The combinatorial constraints are handled using a correction strategy. The SA algorithm is strengthened by embedding Tabu search in order to prevent recycling of recently visited solutions and the resulting algorithm is referred to as tabu embedded simulated Annealing (TSA) algorithm. Computational performance of the proposed TSA algorithm is enhanced through cache-fetch implementation. Numerical experiments have been conducted by considering rectangular composite panels and composite cylindrical shell with different ply numbers and orientations. Numerical studies indicate that the TSA algorithm is quite effective in providing practical designs for lay-up sequence optimisation of laminate composites. The effect of various neighbourhood search algorithms on the convergence characteristics of TSA algorithm is investigated. The sensitiveness of the proposed optimisation algorithm for various parameter settings in simulated annealing is explored through parametric studies. Later, the TSA algorithm is employed for multi-criteria optimisation of hybrid composite cylinders for simultaneously optimising cost as well as weight with constraint on buckling load. The two objectives are initially considered individually and later collectively to solve as a multi-criteria optimisation problem. Finally, the computational efficiency of the TSA based stacking sequence optimisation algorithm has been compared with the genetic algorithm and found to be superior in performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.8A
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• pp.847-857
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• 2007

For the implementation of a RFID system, an anti-collision algorithm is required to identify multiple tags within the range of a RFID Reader. A Bit-by-Bit algorithm is defined by Auto ID Class 0. In this paper, we propose a SBBB(Stack Bit-by-Bit) algorithm. The SBBB algorithm save the collision position and makes a query using the saved data. SBBB improve the efficiency of collision resolution. We show the performance of the SBBB algorithm by simulation. The performance of the proposed algorithm is higher than that of BBB algorithm. Especially, the more each tag bit streams are the duplicate, the higher performance is.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.4
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• pp.561-571
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• 1993

In this paper, a new discrete Symbol Timing Recovery (STR) algorithm, is proposed. This algorithm is derived from the optimum estimation theory. The algorithm combines the advantages of Mueller and $M\"{u}ller$ algorithm and Gardner algorithm, and avoids some of their shortcomings. The implementation of the new timing detector is simple and the combined operations of Carrier Recovery (CR) -STR is possible because the operation of the new STR is independent of the carrier phase. On the other hand, the behavior of nonlinear characteristics in the new algorithm is analyzed and explained. The performance evaluation is accomplished in detail by numerical calculations and Monte-Carlo simulations. In these respects, this algorithm is similar to Gardner's algorithm, but in tracking performance due to pattern jitter at small rolloff, the proposed algorithm is superior to Gardner's algorithm.