• Journal of the Institute of Convergence Signal Processing
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• v.11 no.3
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• pp.238-243
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• 2010

A new implementation method for MPDSAP(Maximally Polyphase Decomposed Subband Affine Projection) adaptive filter is proposed. The affine projection(AP) adaptive filter achieves fast convergence speed, however, its implementation is so expensive because of the matrix inversion for a weight-updating of adaptive filter. The maximally polyphase decomposed subband filtering allows the AP adaptive filter to avoid the matrix inversion, moreover, by using a pipelining technique, the simple subband structured AP is suitable for VLSI implementations concerning throughput, power dissipation and area. Computer simulations are presented to verify the performance of the proposed algorithm.

• Steel and Composite Structures
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• v.7 no.4
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• pp.263-278
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• 2007

A finite element implementation of the modified compression field theory (MCFT) using a tangential formulation is presented in this work. Previous work reported on implementations of MCFT has concentrated mainly on secant formulations. This work describes details of the implementation of a modular algorithmic structure of a reinforced concrete constitutive model in nonlinear finite element schemes that use a Jacobian matrix in the solution of the nonlinear system of algebraic equations. The implementation was verified and validated using experimental and analytical data reported in the literature. The developed algorithm, which converges accurately and quickly, can be easily implemented in any finite element code.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.3
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• pp.1058-1070
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• 2014

There are two major ways to implement depth estimation, multiple image depth estimation and single image depth estimation, respectively. The former has a high hardware cost because it uses multiple cameras but it has a simple software algorithm. Conversely, the latter has a low hardware cost but the software algorithm is complex. One of the recent trends in this field is to make a system compact, or even portable, and to simplify the optical elements to be attached to the conventional camera. In this paper, we present an implementation of depth estimation with a single image using a graphics processing unit (GPU) in a desktop PC, and achieve real-time application via our evolutional algorithm and parallel processing technique, employing a compute shader. The methods greatly accelerate the compute-intensive implementation of depth estimation with a single view image from 0.003 frames per second (fps) (implemented in MATLAB) to 53 fps, which is almost twice the real-time standard of 30 fps. In the previous literature, to the best of our knowledge, no paper discusses the optimization of depth estimation using a single image, and the frame rate of our final result is better than that of previous studies using multiple images, whose frame rate is about 20fps.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.4
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• pp.133-139
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• 2014

Nowadays, telemedicine and remote prescription has been operating as a pilot basis. However, in case of remote hospitals without encrypting the biometric data transmission and its contents, the patient prescription data hacked from hackers who changed prescription medications can be serious obstacles to the patient. Therefore, in this paper, to solve this problem, password encryption, personal identification information, biometric data security on the patient's prescription and remote medical information system, and implementation of the encryption algorithm are proposed.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.8
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• pp.867-873
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• 2014

Since the computation of a multiplicative inverse using MONB includes many squarings and thus calculating inverse is expensive, we, in this paper, propose a low cost inverse algorithm requiring $nb(2^nm-1)+w(2^nm-1)-2$ multiplications and $2^n-1$ squarings to compute an inverse in $GF(2^{2^nm})^*$ using special normal basis over $GF(2^{2^n})$, and give some implementation results using the algorithm and, show that the timing results of our implementation is faster than that of Itoh et al.'s method.

• The KIPS Transactions:PartA
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• v.12A no.1 s.91
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• pp.1-6
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• 2005

This paper presents a new algorithm on low power survivor path memory implementation of the trace-back systolic array Viterbi algorithm. A novel idea is to reuse the already-generated trace-back routes to reduce the number of trace-back operations. And the spurious switching activity of the trace-back unit is reduced by making use of a clock gating method. Using the SYNOPSYS power estimation tool, DesignPower, our experimental result shows the average $40{\%}$ power reduction and $23{\%}$ area increase against the trace-back unit introduced in [1].

• Journal of Power Electronics
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• v.18 no.2
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• pp.522-532
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• 2018

The cascaded H Bridge (CHB) multilevel inverter (MLI) is popular among the classical MLI topologies due to its modularity and reliability. Although space vector modulation (SVM) is the most suitable modulation scheme for MLIs, it has not been used widely in industry due to the higher complexity involved in its implementation. In this paper, a simple and novel generalized SVM algorithm is proposed, which has both reduced time and space complexity. The proposed SVM involves the generalization of both the duty cycle calculation and switching sequence generation for any n-level inverter. In order to generate the gate pulses for an inverter, a generalized switch matrix (SM) for the CHB inverter is also introduced, which further simplifies the algorithm. The algorithm is tested and verified for three-phase, three-level and five-level CHB inverters in simulations and hardware implementation. A comparison of the proposed method with existing SVM schemes shows the superiority of the proposed scheme.

• ETRI Journal
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• v.34 no.1
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• pp.76-86
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• 2012

The block cipher ARIA has been threatened by side-channel analysis, and much research on countermeasures of this attack has also been produced. However, studies on countermeasures of ARIA are focused on software implementation, and there are no reports about hardware designs and their performance evaluation. Therefore, this article presents an advanced masking algorithm which is strong against second-order differential power analysis (SODPA) and implements a secure ARIA hardware. As there is no comparable report, the proposed masking algorithm used in our hardware module is evaluated using a comparison result of software implementations. Furthermore, we implement the proposed algorithm in three types of hardware architectures and compare them. The smallest module is 10,740 gates in size and consumes an average of 47.47 ${\mu}W$ in power consumption. Finally, we make ASIC chips with the proposed design, and then perform security verification. As a result, the proposed module is small, energy efficient, and secure against SODPA.

• The Journal of the Acoustical Society of Korea
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• v.20 no.4E
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• pp.52-60
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• 2001

This paper describes real time implementation of subband sound localization system on a floating-point DSP TI TMS320C31. The system determines two dimensional location of an active speaker in a closed room environment with real noise presents. The system consists of an two microphone array connected to TI DSP hosted by PC. The implemented sound localization algorithm is Subband CPSP which is an improved version of traditional CPSP (Cross-Power Spectrum Phase) method. The algorithm first split the input speech signal into arbitrary number of subband using subband filter banks and calculate the CPSP in each subband. It then averages out the CPSP results on each subband and compute a source location estimate. The proposed algorithm has an advantage over CPSP such that it minimize the overall estimation error in source location by limiting the specific band dominant noise to that subband. As a result, it makes possible to set up a robust real time sound localization system. For real time simulation, the input speech is captured using two microphone and digitized by the DSP at sampling rate 8192 hz, 16 bit/sample. The source location is then estimated at once per second to satisfy real-time computational constraints. The performance of the proposed system is confirmed by several real time simulation of the speech at a distance of 1m, 2m, 3m with various speech source locations and it shows over 5% accuracy improvement for the source location estimation.

• Journal of IKEEE
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• v.17 no.3
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• pp.371-377
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• 2013

This thesis propose an efficient parallel structure method for implementing a FAST and BRIEF algorithm based Augmented Reality. SURF algorithm that is well known in the object recognition algorithms is robust in object recognition. However, there is a disadvantage for real time operation because, SURF implementation requires a lot of computation. Therefore, we used a FAST and BRIEF algorithm for object recognition, and we improved Conventional Parallel Structure based on OpenMP Library. As a result, it achieves a 70%~100% improvement in execution time on the embedded system.