• Title/Summary/Keyword: implementation algorithm

Search Result 4,233, Processing Time 0.032 seconds

Study on the Improvement of Event Data Recorders through Accident Analysis (사고분석 사례를 통한 사고기록장치 개선방안에 대한 고찰)

  • Park, Giok;Kang, Heejin;Jun, Joonho;Kim, Heejune
    • Journal of Auto-vehicle Safety Association
    • /
    • v.13 no.4
    • /
    • pp.66-72
    • /
    • 2021
  • This study was initiated to improve of the defect investigation method using event data recorders (EDR) and suggested a solution through the regulation and system analysis of EDR. The EDR data has been used for various purposes such as the vehicle defect investigation and the traffic accident investigation. However the EDR regulation has not been updated since the implementation in 2012. "Trigger Threshold" can be used to analyze a single accident such as the frontal crash, the side crash, and the rollover. In the case of a complex accident in which a rollover accident and a crash accident occur simultaneously, it is difficult to analyze a complex accident due to current "Trigger Threshold". This study proposed the method of separating the "Trigger Threshold" into a crash accident and a rollover accident so that accidents can be analyzed using the EDR data even when a complex accident occurs. In addition, it proposed the improvement method to quickly use the data of EDR in accident reconstruction software.

Application and Analysis of Masking Method to Implement Secure Lightweight Block Cipher CHAM Against Side-Channel Attack Attacks (부채널 공격에 대응하는 경량 블록 암호 CHAM 구현을 위한 마스킹 기법 적용 및 분석)

  • Kwon, Hongpil;Ha, Jaecheol
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.29 no.4
    • /
    • pp.709-718
    • /
    • 2019
  • A lightweight block cipher CHAM designed for suitability in resource-constrained environment has reasonable security level and high computational performance. Since this cipher may contain intrinsic weakness on side channel attack, it should adopt a countermeasure such as masking method. In this paper, we implement the masked CHAM cipher on 32-bit microprosessor Cortex-M3 platform to resist against side channel attack and analyze their computational performance. Based on the shortcoming of having many round functions, we apply reduced masking method to the implementation of CHAM cipher. As a result, we show that the CHAM-128/128 algorithm applied reduced masking technique requires additional operations about four times.

Discovering Redo-Activities and Performers' Involvements from XES-Formatted Workflow Process Enactment Event Logs

  • Pham, Dinh-Lam;Ahn, Hyun;Kim, Kwanghoon Pio
    • KSII Transactions on Internet and Information Systems (TIIS)
    • /
    • v.13 no.8
    • /
    • pp.4108-4122
    • /
    • 2019
  • Workflow process mining is becoming a more and more valuable activity in workflow-supported enterprises, and through which it is possible to achieve the high levels of qualitative business goals in terms of improving the effectiveness and efficiency of the workflow-supported information systems, increasing their operational performances, reducing their completion times with minimizing redundancy times, and saving their managerial costs. One of the critical challenges in the workflow process mining activity is to devise a reasonable approach to discover and recognize the bottleneck points of workflow process models from their enactment event histories. We have intuitively realized the fact that the iterative process pattern of redo-activities ought to have the high possibility of becoming a bottleneck point of a workflow process model. Hence, we, in this paper, propose an algorithmic approach and its implementation to discover the redo-activities and their performers' involvements patterns from workflow process enactment event logs. Additionally, we carry out a series of experimental analyses by applying the implemented algorithm to four datasets of workflow process enactment event logs released from the BPI Challenges. Finally, those discovered redo-activities and their performers' involvements patterns are visualized in a graphical form of information control nets as well as a tabular form of the involvement percentages, respectively.

Implementation of Low Complexity FFT, ADC and DAC Blocks of an OFDM Transmitter Receiver Using Verilog

  • Joshi, Alok;Gupta, Dewansh Aditya;Jaipuriyar, Pravriti
    • Journal of Information Processing Systems
    • /
    • v.15 no.3
    • /
    • pp.670-681
    • /
    • 2019
  • Orthogonal frequency division multiplexing (OFDM) is a system which is used to encode data using multiple carriers instead of the traditional single carrier system. This method improves the spectral efficiency (optimum use of bandwidth). It also lessens the effect of fading and intersymbol interference (ISI). In 1995, digital audio broadcast (DAB) adopted OFDM as the first standard using OFDM. Later in 1997, it was adopted for digital video broadcast (DVB). Currently, it has been adopted for WiMAX and LTE standards. In this project, a Verilog design is employed to implement an OFDM transmitter (DAC block) and receiver (FFT and ADC block). Generally, OFDM uses FFT and IFFT for modulation and demodulation. In this paper, 16-point FFT decimation-in-frequency (DIF) with the radix-2 algorithm and direct summation method have been analyzed. ADC and DAC in OFDM are used for conversion of the signal from analog to digital or vice-versa has also been analyzed. All the designs are simulated using Verilog on ModelSim simulator. The result generated from the FFT block after Verilog simulation has also been verified with MATLAB.

Countermeasure Techniques Analysis for Power Analysis Attack (전력분석공격에 대한 대응기술 분석)

  • Kang, Young-Jin;Jo, Jung-Bok;Lee, HoonJae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2014.05a
    • /
    • pp.221-223
    • /
    • 2014
  • Power analysis attack on cryptographic hardware device aims to study the power consumption while performing operations using secrets keys. Power analysis is a form of side channel attack which allow an attacker to compute the key encryption from algorithm using Simple Power Analysis (SPA), Differential Power Analysis (DPA) or Correlation Power Analysis (CPA). The theoretical weaknesses in algorithms or leaked informations from physical implementation of a cryptosystem are usually used to break the system. This paper describes how power analysis work and we provide an overview of countermeasures against power analysis attacks.

  • PDF

Design and Implementation of Incremental Learning Technology for Big Data Mining

  • Min, Byung-Won;Oh, Yong-Sun
    • International Journal of Contents
    • /
    • v.15 no.3
    • /
    • pp.32-38
    • /
    • 2019
  • We usually suffer from difficulties in treating or managing Big Data generated from various digital media and/or sensors using traditional mining techniques. Additionally, there are many problems relative to the lack of memory and the burden of the learning curve, etc. in an increasing capacity of large volumes of text when new data are continuously accumulated because we ineffectively analyze total data including data previously analyzed and collected. In this paper, we propose a general-purpose classifier and its structure to solve these problems. We depart from the current feature-reduction methods and introduce a new scheme that only adopts changed elements when new features are partially accumulated in this free-style learning environment. The incremental learning module built from a gradually progressive formation learns only changed parts of data without any re-processing of current accumulations while traditional methods re-learn total data for every adding or changing of data. Additionally, users can freely merge new data with previous data throughout the resource management procedure whenever re-learning is needed. At the end of this paper, we confirm a good performance of this method in data processing based on the Big Data environment throughout an analysis because of its learning efficiency. Also, comparing this algorithm with those of NB and SVM, we can achieve an accuracy of approximately 95% in all three models. We expect that our method will be a viable substitute for high performance and accuracy relative to large computing systems for Big Data analysis using a PC cluster environment.

Design and Implementation of Kernel-Level Split and Merge Operations for Efficient File Transfer in Cyber-Physical System (사이버 물리 시스템에서 효율적인 파일 전송을 위한 커널 레벨 분할 및 결합 연산의 설계와 구현)

  • Park, Hyunchan;Jang, Jun-Hee;Lee, Junseok
    • IEMEK Journal of Embedded Systems and Applications
    • /
    • v.14 no.5
    • /
    • pp.249-258
    • /
    • 2019
  • In the cyber-physical system, big data collected from numerous sensors and IoT devices is transferred to the Cloud for processing and analysis. When transferring data to the Cloud, merging data into one single file is more efficient than using the data in the form of split files. However, current merging and splitting operations are performed at the user-level and require many I / O requests to memory and storage devices, which is very inefficient and time-consuming. To solve this problem, this paper proposes kernel-level partitioning and combining operations. At the kernel level, splitting and merging files can be done with very little overhead by modifying the file system metadata. We have designed the proposed algorithm in detail and implemented it in the Linux Ext4 file system. In our experiments with the real Cloud storage system, our technique has achieved a transfer time of up to only 17% compared to the case of transferring split files. It also confirmed that the time required can be reduced by up to 0.5% compared to the existing user-level method.

BSSSQS: A Blockchain-Based Smart and Secured Scheme for Question Sharing in the Smart Education System

  • Islam, Anik;Kader, Md Fazlul;Shin, Soo Young
    • Journal of information and communication convergence engineering
    • /
    • v.17 no.3
    • /
    • pp.174-184
    • /
    • 2019
  • In this study, we present a new scheme for smart education utilizing the concept of a blockchain for question sharing. A two-phase encryption technique for encrypting question papers (QSPs) is proposed. In the first phase, QSPs are encrypted using a timestamp, and in the second phase, previously encrypted QSPs are encrypted again using a timestamp, salt hash, and hash from the previous QSPs. These encrypted QSPs are stored in a blockchain along with a smart contract that helps the user to unlock the selected QSP. An algorithm is also proposed for selecting a QSP for the exam that randomly picks a QSP. Moreover, a timestamp-based lock is imposed on the scheme so that no one can decrypt the QSP before the allowed time. Security analysis is conducted to demonstrate the feasibility of the proposed scheme against different attacks. Finally, the effectiveness of the proposed scheme is demonstrated through implementation, and the superiority of the proposed scheme over existing schemes is proven through a comparative study based on different features.

λ/64-spaced compact ESPAR antenna via analog RF switches for a single RF chain MIMO system

  • Lee, Jung-Nam;Lee, Yong-Ho;Lee, Kwang-Chun;Kim, Tae Joong
    • ETRI Journal
    • /
    • v.41 no.4
    • /
    • pp.536-548
    • /
    • 2019
  • In this study, an electronically steerable parasitic array radiator (ESPAR) antenna via analog radio frequency (RF) switches for a single RF chain MIMO system is presented. The proposed antenna elements are spaced at ${\lambda}/64$, and the antenna size is miniaturized via a dielectric radome. The optimum reactance load value is calculated via the beamforming load search algorithm. A switch simplifies the design and implementation of the reactance loads and does not require additional complex antenna matching circuits. The measured impedance bandwidth of the proposed ESPAR antenna is 1,500 MHz (1.75 GHz-3.25 GHz). The proposed antenna exhibits a beam pattern that is reconfigurable at 2.48 GHz due to changes in the reactance value, and the measured peak antenna gain is 4.8 dBi. The reception performance is measured by using a $4{\times}4$ BPSK signal. The measured average SNR is 17 dB when using the proposed ESPAR antenna as a transmitter, and the average SNR is 16.7 dB when using a four-conventional monopole antenna.

Implementation and Performance Evaluation of Linux-based Scheduler for improving MPTCP Performance in Heterogeneous Networks (이종 망에서 MPTCP 성능 향상을 위한 리눅스 기반의 스케줄러 구현 및 성능 평가)

  • Ahn, Jong-won;Kim, Do-ho;Kim, Min-seob;Lee, Jae-yong;Kim, Byung-chul
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2019.05a
    • /
    • pp.448-450
    • /
    • 2019
  • Multipath TCP (MPTCP) is a standardized transport layer protocol for maximizing the use of finite network resources by using multiple interfaces simultaneously. If the characteristics of each path are the same, there is an advantage in terms of stability and bandwidth utilization compared to the existing single TCP. However, if the path characteristics are different, the performance is lower than that of a single TCP. There are many complex reasons for this, but one of the biggest impacts is the bufferbloat, which dramatically increases the latency. In this paper, we implemented an algorithm that improved MPTCP performance degradation due to bufferbloat in Linux - based testbed and compared performance with existing MPTCP scheduler.

  • PDF