• IE interfaces
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• v.22 no.1
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• pp.85-94
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• 2009

Nowadays, most of the major manufacturing companies prepare their manufacturing schedule using package based solutions. Even though the accuracy of the detail scheduling result is high at implementation, however, it is low during maintenance period. The main cause of low accuracy during maintenance period is due to difficulties in maintaining the accurate level of master data. In this paper, we propose to easily maintain setup time, which is one of the most important factors required in master data to achieve good scheduling result, after changing job. This paper is mainly focused on how to deduce the factors that influence the setup time in a roll-based manufacturing field with print operations. For this purpose, we employed rule based algorithm and applied for deciding setup time for the existing product items. Likewise, it can be applied to new items without any complex setup procedures, and, finally, it displays the result of the real setup-time and calculated setup-time.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.679-682
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• 1998

This paper presents the VLSI implementation of RS(reed-solomon) decoder using the Modified Euclidean Algorithm(hereafter MEA) for DVD(Digital Versatile Disc) and CD(Compact Disc). The decoder has a capability of correcting 8-error or 16-erasure for DVD and 2-error or 4-erasure for CD. The technique of polynomial evaluation is introduced to realize syndrome calculation and a polynomial expansion circuit is developed to calculate the Forney syndrome polynomial and the erasure locator polynomial. Due to the property of our system with buffer memory, the MEA architecture can have a recursive structure which the number of basic operating cells can be reduced to one. We also proposed five criteria to determine an uncorrectable codeword in using the MEA. The overall architecture is a simple and regular and has a 4-stage pipelined structure.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.131-136
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• 2005

UWB is the most spotlighted wireless technology that transmits data at very high rates using low power over a wide spectrum of frequency band. UWB technology makes it possible to transmit data at rate over 100Mbps within 10 meters. To preserve important header information, MB-OFDM UWB adopts Reed-Solomon(23,17) code. In receiver, RS decoder needs high speed and low latency using efficient hardware. In this paper, we suggest the architecture of RS decoder for MB-OFDM UWB. We adopts Modified-Euclidean algorithm for key equation solver block which is most complex in area. We suggest pipelined processing cell for this block and show the detailed architecture of syndrome, Chien search and Forney algorithm block. At last, we show the hardware implementation results of RS decoder for ASIC implementation.

• ETRI Journal
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• v.36 no.1
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• pp.183-186
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• 2014

In this letter, we consider a cooperation system with multiple untrusted relays (URs). To keep the transmitted information confidential, we obtain joint channel characteristics (JCCs) through combining the channels from the source to the destination. Then, in the null space of the JCCs, jammers construct artificial noise to confuse URs when the source node broadcasts its data. Through a distributed implementation algorithm, the weight of each node can be obtained from its own channel state information. Simulation results show that high-level security of the system can be achieved when internal and external eavesdroppers coexist.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.11
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• pp.1137-1143
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• 2009

This paper presents the FPGA implementation of efficient algorithms for approximating exponential function based on floating point format data. The Taylor-Maclaurin expansion as a conventional approximation method becomes inefficient since high order expansion is required for the large number to satisfy the approximation error. A format converter is designed to convert fixed data format to floating data format, and then the real number is separated into two fields, an integer field and an exponent field to separately perform mathematic operations. A new assembly command is designed and added to previously developed command set to refer the math table. To test the proposed algorithm, assembly program has been developed. The program is downloaded into the Altera DSP KIT W/STRATIX II EP2S180N Board. Performances of the proposed method are compared with those of the Taylor-Maclaurin expansion.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.195-198
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• 2005

UWB is the most spotlighted wireless technology that transmits data at very high rates using low power over a wide spectrum of frequency band. UWB technology makes it possible to transmit data at rate over 100Mbps within 10 meters. To preserve important header information, MBOFDM UWB adopts Reed-Solomon(23,17) code. In receiver, RS decoder needs high speed and low latency using efficient hardware. In this paper, we suggest the architecture of RS decoder for MBOFDM UWB. We adopts Modified-Euclidean algorithm for key equation solver block which is most complex in area. We suggest pipelined processing cell for this block and show the detailed architecture of syndrome, Chien search and Forney algorithm block. At last, we show the hardware implementation results of RS decoder for ASIC implementation.

• Journal of Korean Institute of Industrial Engineers
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• v.23 no.3
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• pp.581-595
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• 1997

The procedure of grouping the machines and parts to form cells is called manufacturing cell design. The manufacturing cell design is an important step in the development and implementation of advanced manufacturing systems. For the successful implementation of the manufacturing systems, identification of independent manufacturing cells, i.e., cells where parts are completely processed in the cell and no intercell movements, is necessary in the design phase. In this paper, we developed a mixed integer programming model and genetic algorithm based procedure to solve the independent manufacturing cells design problem considering the alternative process plans and machines duplication. Several manufacturing parameters such as, production volume, machine capacity, processing time, number of cells and cell size, are considered in the process. The model determines the process plan for parts, port families and machine cells simultaneously. The model has been verified with the numerical examples.

• Journal of the Korea Institute of Military Science and Technology
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• v.12 no.6
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• pp.733-738
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• 2009

In this paper, we have proposed the design and implementation for efficient Command Control and Alert(C2A). Information fusion must be done for knowing the state and identification of targets using multi-sensor. The threat priority of targets which are processed and identified by information fusion is calculated by air-defence operation logic. The threat targets are assigned to the valid and effective weapons by nearest neighborhood algorithm. Furthermore, the assignment result allows operators to effectively operate C2A by providing the operators with visualizing symbol color and the assignment pairing color line. We introduce the prototype which is implemented by the proposed design and algorithm.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1682-1691
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• 2015

In this paper, a real time implementation of selective harmonic elimination pulse width modulation (SHEPWM) using Real Coded Genetic Algorithm (RGA), Particle Swarm Optimization technique (PSO) and a new technique known as Linearization Method (LM) for Single Phase Matrix Converter (SPMC) is designed and discussed. In the proposed technique, the switching frequency is fixed and the optimum switching angles are obtained using simple mathematical calculations. A MATLAB simulation was carried out, and FFT analysis of the simulated output voltage waveform confirms the effectiveness of the proposed method. An experimental setup was also developed, and the switching angles and firing pulses are generated using Field Programmable Gate Array (FPGA) processor. The proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real time applications.

• Proceedings of the KIEE Conference
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• 2005.07d
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• pp.3066-3068
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• 2005

Noise can make surrounding environments inferior and deteriorates operation efficiency, and it can bring aural damage as well as give a person psychological stress. Therefore, necessity of study about noise control is increased for better labor conditions and agreeable habitat. In this paper, implementation of active mufflers using a stable IIR adaptive filters is presented. The IIR filter structure is more effective when acoustic feedback exists, but the adaptive IIR filters could be unstable when the filter algorithm is not yet converged. A stabilizing process for adaptive IIR filter is introduced in this paper. Experiments using a TMS320C32 digital signal processor have performed to show the effectiveness of a proposed algorithm.