• Title/Summary/Keyword: implementation algorithm

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Edge preserving method using mean curvature diffusion in aerial imagery

  • Ye, Chul-Soo;Kim, Kyoung-Ok;Yang, Young-Kyu;Lee, Kwae-Hi
    • Proceedings of the KSRS Conference
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    • 2002.10a
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    • pp.54-58
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    • 2002
  • Mean curvature diffusion (MCD) is a selective smoothing technique that promotes smoothing within a region instead of smoothing across boundaries. By using mean curvature diffusion, noise is eliminated and edges are preserved. In this paper, we propose methods of automatic parameter selection and implementation for the MCD model coupled to min/max flow. The algorithm has been applied to high resolution aerial images and the results show that noise is eliminated and edges are preserved after removal of noise.

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Infrastructure of Grid-based Distributed Remotely Sensed Images Processing Environment and its Parallel Intelligence Algorithms

  • ZHENG, Jiang;LUO, Jian-Cheng;Hu, Cheng;CHEN, Qiu-Xiao
    • Proceedings of the KSRS Conference
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    • 2003.11a
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    • pp.1284-1286
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    • 2003
  • There is a growing demand on remotely sensed and GIS data services in modern society. However, conventional WEB applications based on client/server pattern can not meet the criteria in the future . Grid computing provides a promising resolution for establishing spatial information system toward future applications. Here, a new architecture of the distributed environment for remotely sensed data processing based on the middleware technology was proposed. In addition, in order to utilize the new environment, a problem had to be algorithmically expressed as comprising a set of concurrently executing sub-problems or tasks. Experiment of the algorithm was implemented, and the results show that the new environmental can achieve high speedups for applications compared with conventional implementation.

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Implementation of a SAR GeoCoding Module based on component

  • Kim, Kwang-Yong;Jeong, Soo;Kim, Kyung-Ok
    • Proceedings of the KSRS Conference
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    • 2003.11a
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    • pp.337-339
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    • 2003
  • This paper describes the SAR geocoding module, which is the sub-module of a IRHIS ('Integrated RS s/w for High resolution satellite ImageS'): package of 'Development of High Resolution Satellite Image Processing Technique' project in Electronics and Telecommunications Research Institute (ETRI). The function of this module is following. 1) Orbit Type : ERS1/ERS2, RADARSAT 2) Data Format : SAR CEOS Format(Single Look Complex) 3) Function: - Geocode : Generate a map projected SAR image based on only orbit information - Orthorectify: Generate a rigorous geocoded SAR image with a DEM information In this paper, we briefly describe the algorithm that is adopted to the functions, and component architecture.

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Organizing Lidar Data Based on Octree Structure

  • Wang, Miao;Tseng, Yi-Hsing
    • Proceedings of the KSRS Conference
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    • 2003.11a
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    • pp.150-152
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    • 2003
  • Laser scanned lidar data record 3D surface information in detail. Exploring valuable spatial information from lidar data is a prerequisite task for its applications, such as DEM generation and 3D building model reconstruction. However, the inherent spatial information is implicit in the abundant, densely and randomly distributed point cloud. This paper proposes a novel method to organize point cloud data, so that further analysis or feature extraction can proceed based on a well organized data model. The principle of the proposed algorithm is to segment point cloud into 3D planes. A split and merge segmentation based on the octree structure is developed for the implementation. Some practical airborne and ground lidar data are tested for demonstration and discussion. We expect this data organization could provide a stepping stone for extracting spatial information from lidar data.

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A Tone Detector USing Cascaded Nonlinear Energy Trackers (비선형 에너지 추적기를 중첩 사용한 근접된 톤 신호의 검출)

  • 황성수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.9B
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    • pp.1563-1569
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    • 2000
  • Teager-Kaiser algorithm that can track the energy of tone signals with simple nonlinear operations, has been applied to detection of tone signals closely spaced in frequency. The performance of the previous detector depends upon the performance of internal filters. An improved scheme is proposed in this paper by employing the nonlinear energy trackers in cascade. The proposed detector is analytically designed and verified by computer simulation. It shows that the new detection scheme improves the detection performance while reducing the implementation complexity.

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On Compensating Nonlinear Distortions of an OFDM System Using an Efficient Adaptive Predistorter (효과적인 적응 전처리왜곡기를 이용한 OFDM 시스템에서의 비선형 왜곡 보상)

  • 강현우;조용수;윤대희
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.4
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    • pp.696-705
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    • 1997
  • This paper presents an efficient adaptive predistortion technique compensating linear and nonlinear distortions caused by high-power amplifier (HPA) with memory in OFDM systems. The efficient adaptive data predistortion techniques proposed for compensation of HPA with memory in single carrier systems cannot be applied to OFDM systems since the possible input levels for HPA is infinite in OFDM systems. Also, previous adaptive predistortion techniques, based on Volterra series modeling, are not suitable for real-time implementation due to high computational burden and slow convergence rate. In the proposed approach, the memoryless HPA preceded by a linear filter in OFDM systems is modeled by the Wiener system which is then precompensated by the proposed adaptive predistorter with a minimum number of filter taps. An adaptive algorithm for adjusting the proposed adaptive predistorter is derived using the stochastic gradient method. It is demonstrated by computer simulation that the performance of OFDM system suffering from nonlinear distortion can be greatly improved by the proposed efficient adaptive predistorter using a small number of filter taps.

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An Interactive Methodology for the Web-based GDSS

  • Kim, Jae-Kyeong;Cho, Yoon-Ho
    • Proceedings of the Korea Inteligent Information System Society Conference
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    • 2000.11a
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    • pp.375-383
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    • 2000
  • This research suggests an interactive methodology fur multiple objective linear programming problems to help the group select a compromising solution in the World Wide Web environment. Our methodology lessens the burden of group decision makers, which is one of necessary conditions of the web environment. Only the partial weak order of variables and objectives from the group decision makers are enough for searching the best compromising solution. For such a purpose, we expand the Dror and Gass algorithm to the group decision context. And we suggest the system architecture of a web-based GDSS fur the implementation of our methodology.

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Implementation of Dual Current Controller and Realtime Power Limiting Algorithm during Unbalanced Voltage Conditions (전원 전압 불평형시 유효전력 리플 억제를 위한 듀얼 전류제어기 구현과 출력 전력의 실시간 제한 알고리즘)

  • Song, Seung-Ho;Kim, Jeong-Jae
    • Proceedings of the KIEE Conference
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    • 2005.10c
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    • pp.244-249
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    • 2005
  • 본 논문에서는 전원 불평형시 일반적인 계통연계형 인버터의 유효전력의 리플을 효과적으로 제거하는 동시에 인버터의 운전가능 영역을 제한해 반도체 스위치 소자를 보호하면서 운전하는 방법을 제안한다. 헌재 불평형된 전압의 정보로부터 계통연계 인버터가 반도체 스위치 소자의 전류 정격을 넘지 않고 처대로 출력할 수 있는 유효전력량을 실시간으로 계산하고 계통으로 출력되는 전력이 이 값을 넘지 않도록 제어한다. 시뮬레이션과 실험을 통해 제안된 전력제한 알고리즘의 동작특성을 검증하였다.

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One Chip Microprocessor-based Adjustable Speed Control System of Switched Reluctance Motor (원 칩 마이크로프로세서를 이용한 SRM의 가변속 제어)

  • Choe, Ki-Won;Lee, Chun-Ho;Kim, Ki-Su;Choe, Gyu-Ha;Jang, Do-Hyun
    • Proceedings of the KIEE Conference
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    • 1995.07a
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    • pp.318-320
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    • 1995
  • This paper describes the practical implementation of switched reluctance motor drive for a wide range of operation speeds. The angle controller is designed by one-chip microprocessor 8051 for various real time applications. Algorithm to control the speed of SRM and to maintain the speed under the changed load is proposed.

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VHDL Chip Set Design and implementation for Memory Tester Algorithm (Memory Tester 알고리즘의 VHDL Chip Set 설계 및 검증)

  • Jeong, Ji-Won;Gang, Chang-Heon;Choe, Chang;Park, Jong-Sik
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.924-927
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    • 2003
  • In this paper, we design the memory tester chip set playing an important role in the memory tester as central parts. Memory tester has the sixteen inner instructions to control the test sequence and the address and data signals to DUT. These instructions are saved in memory with each chip such as sequence chip and address/data generator chip. Sequence chip controls the test sequence according to instructions saved in the memory. And Generator chip generates the address and data signals according to instructions saved in the memory, too.

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