• Title/Summary/Keyword: implementation algorithm

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The Implementation and Performance Analysis of Channel Card of Smart Antenna System in CDMA 1x Environment (CDMA2000 1x 환경하에서 스마트 안테나 시스템의 채널카드 구현 및 성능 분석)

  • 박재용;안성수;최승원
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.1
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    • pp.1-11
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    • 2004
  • This paper presents an implementation of smart antenna system channel card that executes modulation/demodulation. Operations and performances of modules of implemented channel card is confirmed and field test of channel card shows the performance of smart antenna systems. Based on the analysis obtained from the field test in cdma2000 1x environments which contains multipath lading, it is confirmed that smart antenna system channel card provide exact beampattern to the DOA and performance of proposed channel card has better FER by 5∼8 times, compared to 2 antenna diversity system.

Development and Security Analysis of GIFT-64-Variant That Can Be Efficiently Implemented by Bit-Slice Technique (효율적인 비트 슬라이스 구현이 가능한 GIFT-64-variant 개발 및 안전성 분석)

  • Baek, Seungjun;Kim, Hangi;Kim, Jongsung
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.30 no.3
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    • pp.349-356
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    • 2020
  • GIFT is a PRESENT-like cryptographic algorithm proposed in CHES 2017 and used S-box that can be implemented through a bit-slice technique[1]. Since bit-permutation is used as a linear layer, it can be efficiently implemented in hardware, but bit-slice implementation in software requires a specific conversion process, which is costly. In this paper, we propose a new bit-permutation that enables efficient bit-slice implementation and GIFT-64-variant using it. GIFT-64-variant has better safety than the existing GIFT in terms of differential and linear cryptanalysis.

Implementation of Advanced Dynamic Signature Verification System (고성능 동적 서명인증시스템 구현)

  • Kim, Jin-Whan;Cho, Hyuk-Gyu;Cha, Eui-Young
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.462-466
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    • 2005
  • Dynamic (On-line) signature verification system consists of preprocessing, feature extraction, comparison and decision process for internal processing, and registration and verification windows for the user interface. We describe an implementation and design for an advanced dynamic signature verification system. Also, we suggest the method of feature extraction, matching algorithm, efficient user interface and an objective criteria for evaluating the performance.

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A Schedulability Analysis and Implementation of Distributed Real-Time Processes (분산 실시간 프로세스의 스케줄가능성 분석 및 구현)

  • 박흥복;김춘배
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.1
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    • pp.209-221
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    • 1999
  • Several approaches to anlayzing real-time schedulability have been presented, but since these used a fixed priority scheduling scheme and/or traverse all possible state spaces, there take place exponential time and space complexity of these methods. Therefore it is necessary to reduce the state space and detect schedulability at earlier time. This paper proposes and implements an advanced schedulability analysis algorithm to determine that is satisfied a given deadlines for real-time processes. These use a minimum execution time of process, periodic, deadline, and a synchronization time of processes to detect schedulability at earlier time and dynamic scheduling scheme to reduce state space using the transition rules of process algebra. From a result of implementation, we demonstrated the effective performance to determine schedulability analysis.

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Implementation of the VHF EPIRB using the technique of Digital Selective Calling (디지털 선택호출 기술을 이용한 VHF EPIRB의 구현)

  • 유형열;이헌택;황운택;김기문
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.2 no.2
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    • pp.259-266
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    • 1998
  • 406MHz and INMARSAT-E EPIRB facility transmits the distress alerts by the relay of the polar-satellites and INTELSAT, but may cause the probability of delayed transmission because of the orbital period and not compliance with the implementation of GMDSS rules for small ships in A1 area.. Digital Selective Calling forms a critical part of the terrestrial elements of the GMDSS system and ensures the reliability and the efficiency in the system. In this paper, we suggests that new DSC EPIRB in the VHF band to overcome this defect for small ships in A1 area, and analyze the ITU-R recommendations and technical characteristics, design and implement the algorithm of calling sequences, frequency synthesizer for the RF signal and FSK moulation signals.

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An Adaptive Transversal Filter for GNSS Receiver: Implementation and Performance Evaluation

  • Lee, Geon-Woo;Choi, Jin-Kyu;Shin, Dong-Ho;Kim, Young-Il;Park, Chan-Sik;Hwang, Dong-Hwan;Lee, Sang-Jeong
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • v.2
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    • pp.353-357
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    • 2006
  • One-sided and two-sided ATF for GNSS receiver are deigned, implemented and evaluated in this paper. The difference f filter characteristics such as the location of zeros and the frequency response is reviewed and examined with experiments. NLMS adaptation algorithm is adopted for updating the weighting coefficients of the 12-tap FIR filter. he performance of ATF is evaluated using real signals consisting of the signals from GPS simulator and the signal generator. The output of ATF is fed into the SDR to evaluate SNR and the position accuracy. The complexity of implementation is also compared and the effects of the time delay and the phase delay are examined. The experimental results show that one-sided and two-sided ATF give similar performance against single tone CWI.

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A Mathematical Implementation of OFDM System with Orthogonal Basis Matrix (직교 기저행렬을 이용하는 직교 주파수분할다중화의 수학적 구현)

  • Kang, Seog-Geun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.12
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    • pp.2731-2736
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    • 2009
  • In this paper, a new implementation method of OFDM (orthogonal frequency division multiplexing) system with an orthogonal basis matrix is developed mathematically. The basis matrix is based on the Haar basis but has an appropriate form for modulation of multiple subchannel signals of OFDM. It is verified that the new basis matrix can be expanded with a simple recursive algorithm. The order of synthesis matrix in the transmitter is increased by the factor of two with every expansion. Demodulation in the receiver is carried out by its inverse matrix, which can be generated recursively with the orthogonal basis matrix. It is shown that perfect reconstruction of original signals is possibly achieved in the proposed OFDMsystem.

Implementation of an Export System for GIS Arrester Facilities (GIS 피뢰설비 전문가 시스템 구현)

  • Kim, Il-Kwon;Song, Jae-Yong;Moon, Seung-Bo;Cha, Myung-Soo;Rhyu, Keel-Soo;Kil, Gyung-Suk
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1465-1466
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    • 2006
  • The monitoring and diagnosing technique for lightning arresters is important to assure the reliability of power supply in GIS-substation. In this paper, we described the implementation of an expert system for GIS arrester facilities. The proposed system consists of a data acquisition module (DAM), a wireless communication module, and a personal computer. The DAM detects system voltages, total leakage currents and its harmonic components, and includes an algorithm to calculate the resistive leakage current by the principle that the magnitudes of resistive leakage current are equal at the same level of the system voltage applied to the arrestor. Also, we designed a surge event detection circuit which can acquire the date, the polarity, and the amplitude of surge events. All the acquired data are transmitted after correction by many algorithms to the remote station through the ZigBee protocol. The expert system is based on the Jave Expert System Shell (JESS) and make more reliable decision by using an exclusive inference process.

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A Hardware Implementation of Whirlpool Hash Function using 64-bit datapath (64-비트 데이터패스를 이용한 Whirlpool 해시 함수의 하드웨어 구현)

  • Kwon, Young-Jin;Kim, Dong-Seong;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.10a
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    • pp.485-487
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    • 2017
  • The whirlpool hash function adopted as an ISO / IEC standard 10118-3 by the international standardization organization is an algorithm that provides message integrity based on an SPN (Substitution Permutation Network) structure similar to AES block cipher. In this paper, we describe the hardware implementation of the Whirlpool hash function. The round block is designed with a 64-bit data path and encryption is performed over 10 rounds. To minimize area, key expansion and encryption algorithms use the same hardware. The Whirlpool hash function was modeled using Verilog HDL, and simulation was performed with ModelSim to verify normal operation.

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A Novel Analytical Method for Selective Harmonic Elimination Problem in Five-Level Converters

  • Golshan, Farzad;Abrishamifar, Adib;Arasteh, Mohammad
    • Journal of Power Electronics
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    • v.17 no.4
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    • pp.914-922
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    • 2017
  • Multilevel converters have attracted a lot of attention in recent years. The efficiency parameters of a multilevel converter such as the switching losses and total harmonic distortion (THD) mainly depend on the modulation strategy used to control the converter. Among all of the modulation techniques, the selective harmonic elimination (SHE) method is particularly suitable for high-power applications due to its low switching frequency and high quality output voltage. This paper proposes a new expression for the SHE problem in five-level converters. Based on this new expression, a simple analytical method is introduced to determine the feasible modulation index intervals and to calculate the exact value of the switching angles. For each selected harmonic, this method presents three-level or five-level waveforms according to the value of the modulation index. Furthermore, a flowchart is proposed for the real-time implementation of this analytical method, which can be performed by a simple processor and without the need of any lookup table. The performance of the proposed algorithm is evaluated with several simulation and experimental results for a single phase five-level diode-clamped inverter.