• Title/Summary/Keyword: implementation algorithm

Search Result 4,234, Processing Time 0.031 seconds

Design and Implementation of Music Information Retrieval System (선율을 이용한 음악정보 검색 시스템의 설계 및 구현)

  • Jee, Jeong-Gyu;Oh, Hey-Sock
    • The Transactions of the Korea Information Processing Society
    • /
    • v.5 no.1
    • /
    • pp.1-11
    • /
    • 1998
  • This paper describes design and implementation of the system that is used to efficiently retrieve music information at a digital music library. Unlike typical music information retrieval systems, this system allows the user to sing a part of the melody through the microphone which he/she wants to find rather than using title, composer or the subject catalog to search. The system then recognizes the musical notes information through the signal processing of the sounds of the entered melody, and the intervals contour is created based on this information and used as a search pattern. By running the proposed notes string search algorithm that uses the musical notes information processed with the user input, and it produces the approximate search results. Therefore, users are able to retrieve and appreciate the music whenever he/she can sing any portion of the desired music.

  • PDF

Implementation of Color-Temperature Conversion System using X-Chromaticity Coorindate (X-색도 좌표를 이용한 색온도 변환 시스템 구현)

  • Lee, Ho-Nam;Lee, Bong-Geun;Mun, O-Hak;Gang, Bong-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.39 no.8
    • /
    • pp.64-73
    • /
    • 2002
  • In this Paper, we propose the color-temperature conversion method using an one-dimensional illuminant chromaticity. It also presents the design and the implementation of the proposed method. The performance of the method is compared with that of two-dimensional conversion method in Robertson's algorithm based on calculated color temperatures. The proposed method is demonstrated experimentally for color temperatures in the range of 3,000OK to 25,000OK with the Xilinx Virtex-E FPGA XCV2000E-6BG560.

An Implementation of Digital Filters Usign the Residue Number System of small Modulus (소 모듈러스들로 구성된 RNS를 사용한 디지털 필터의 실현)

  • Lee, Jeong-Mun;Bae, Jeong-Lee;Choe, Gye-Geun
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.20 no.6
    • /
    • pp.6-10
    • /
    • 1983
  • In this paper, an implementation method for digital filters using the residue arithmetic is proposed. This method can be used for processing digital signals with larger number of bits by applying the idea of the bit-slice algorithm, while previous residue digital filters can process digital signals with only a small number of bits. Furthermore, high-speed residue addition, subtrac-tion, and multiplication using look-up tables make it possible to get more flexible filters. Everything that is mentioned above is proved by implementing a cascade fourth-order Butterworth lowpass digital filter using this method.

  • PDF

A study on the design and implementation of uplink receiver for BWLL Base Station modem (광대역 무선가입자망 기지국용 모뎀의 상향링크 수신기 설계 및 구현에 관한 연구)

  • 남옥우;김재형
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2001.10a
    • /
    • pp.307-310
    • /
    • 2001
  • In this paper we describe the design and implementation of uplink receiver for BWLL base station modem. The demodulator consists of digital down converter, matched filter and synchronization circuits. For symbol timing recovery we use Gardner algorithm. And we use forth power method and decision directed method for carrier frequency recovery and phase recovery, respectively. For the sake of performance analysis, we compare simulation results with the board implemented by FPGA which is APEX20KE series chip for Alter. The performance results show it works quite well up to the condition that a frequency offset equal to 4.7% of symbol rate.1

  • PDF

FPGA Implementation of Differential CORDIC-based high-speed phase calculator for 3D Depth Image Extraction (3차원 Depth Image 추출용 Differential CORDIC 기반 고속 위상 연산기의 FPGA 구현)

  • Koo, Jung-youn;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2013.10a
    • /
    • pp.350-353
    • /
    • 2013
  • In this paper, a hardware implementation of phase calculator for extracting 3D depth image from TOF(Time-Of-Flight) sensor is proposed. The designed phase calculator, which adopts redundant binary number systems and a pipelined architecture to improve throughput and speed, performs arctangent operation using vectoring mode of DCORDIC algorithm. Fixed-point MATLAB simulations are carried out to determine the optimized bit-widths and number of iteration. The designed phase calculator is verified by emulating the restoration of virtual 3D data using MATLAB/Simulink and FPGA-in-the-loop verification, and the estimated performance is about 7.5 Gbps at 469 MHz clock frequency.

  • PDF

Development of Nonlinear Programming Approaches to Large Scale Linear Programming Problems (비선형계획법을 이용한 대규모 선형계획해법의 개발)

  • Chang, Soo-Y.
    • Journal of Korean Institute of Industrial Engineers
    • /
    • v.17 no.2
    • /
    • pp.131-142
    • /
    • 1991
  • The concept of criterion function is proposed as a framework for comparing the geometric and computational characteristics of various nonlinear programming approaches to linear programming such as the method of centers, Karmakar's algorithm and the gravitational method. Also, we discuss various computational issues involved in obtaining an efficient parallel implementation of these methods. Clearly, the most time consuming part in solving a linear programming problem is the direction finding procedure, where we obtain an improving direction. In most cases, finding an improving direction is equivalent to solving a simple optimization problem defined at the current feasible solution. Again, this simple optimization problem can be seen as a least squares problem, and the computational effort in solving the least squares problem is, in fact, same as the effort as in solving a system of linear equations. Hence, getting a solution to a system of linear equations fast is very important in solving a linear programming problem efficiently. For solving system of linear equations on parallel computing machines, an iterative method seems more adequate than direct methods. Therefore, we propose one possible strategy for getting an efficient parallel implementation of an iterative method for solving a system of equations and present the summary of computational experiment performed on transputer based parallel computing board installed on IBM PC.

  • PDF

Iterative Decoding Performance for Gray Coded QAM Signals with I/Q Phase Unbalance (I/Q 위상 불균형을 동반한 Gray 부호화된 QAM 신호의 반복 복호 성능)

  • Kim Ki-Seol;Park Sang-Kyu
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.31 no.6A
    • /
    • pp.611-616
    • /
    • 2006
  • In this paper, we propose a practical implementation method of a soft bit decision expression for an R-QAM (Gray coded Rectangular Quadrature Amplitude Modulation) signal based on the Max-Log-MAP algorithm. The parameters of the soft decision expression for the practical implementation can be obtained with simple arithmetic functions associated with some deterministic parameters such as a received value, distances between symbols, and the order of modulation on a signal space. Also, we analyze the performance of an iterative decoding scheme for the QAM signal with I/Q phase unbalance. The unbalance results from the non-ideal characteristic of components such as a phase shifter between in-phase and quadrature paths for quadrature modulator/demondulator.

Novel Architecture for Efficient Implementation of Dimmable VPPM in VLC Lightings

  • Jeong, Jin-Doo;Lim, Sang-Kyu;Jang, Il-Soon;Kim, Myung-Soon;Kang, Tae-Gyu;Chong, Jong-Wha
    • ETRI Journal
    • /
    • v.36 no.6
    • /
    • pp.905-912
    • /
    • 2014
  • In this paper, a new architecture is proposed to achieve complexity efficiency in implementing variable pulse position modulation (VPPM). VPPM, specified in IEEE 802.15.7, can support wireless communication and dimming control simultaneously using visible light. The proposed architecture is based on the VPPM signal property in which the transition point of the modulated output is obtained by counting the sample index and comparing it to both the assigned dimming factor and the transmitting data. Therefore, the proposed architecture can be composed of simple logics, including a counter, a comparator, and an inverter, all of which are insensitive to the dimming resolution in contrast to a conventional codeword-table method. This paper describes the verification of the proposed algorithm through a register-transfer level implementation of the codeword and proposed architectures. In comparison with the codeword-table method, the proposed method gains a nine-fold complexity reduction at a 1% dimming-step resolution.

Direct assignment of the dynamics of a laboratorial model using an active bracing system

  • Moutinho, C.;Cunha, A.;Caetano, E.
    • Smart Structures and Systems
    • /
    • v.8 no.2
    • /
    • pp.205-217
    • /
    • 2011
  • This article describes the research work involving the implementation of an Active Bracing System aimed at the modification of the initial dynamics of a laboratorial building structure to a new desired dynamics. By means of an adequate control force it is possible to assign an entirely new dynamics to a system by moving its natural frequencies and damping ratios to different values with the purpose of achieving a better overall structural response to external loads. In Civil Engineering applications, the most common procedures for controlling vibrations in structures include changing natural frequencies in order to avoid resonance phenomena and increasing the damping ratios of the critical vibration modes. In this study, the actual implementation of an active system is demonstrated, which is able to perform such modifications in a wide frequency range; to this end, a plane frame physical model with 4 degrees-of-freedom is used. The Active Bracing System developed is actuated by a linear motor controlled by an algorithm based on pole assignment strategy. The efficiency of this control system is verified experimentally by analyzing the control effect obtained with the modification of the initial dynamic parameters of the plane frame and observing the subsequent structural response.

Implementation of Digital Filters on Pipelined Processor with Multiple Accumulators and Internal Datapaths

  • Hong, Chun-Pyo
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.4 no.2
    • /
    • pp.44-50
    • /
    • 1999
  • This paper presents a set of techniques to automatically find rate optimal or near rate optimal implementation of shift-invariant flow graphs on pipelined processor, in which pipeline processor has multiple accumulators and internal datapaths. In such case, the problem to be addressed is the scheduling of multiple instruction streams which control all of the pipeline stages. The goal of an automatic scheduler in this context is to rearrange the order of instructions such that they are executed with minimum iteration period between successive iteration of defining flow graphs. The scheduling algorithm described in this paper also focuses on the problem of removing the hazards due to inter-instruction dependencies.

  • PDF