• Title/Summary/Keyword: implementation algorithm

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Implementation of a Self Controlled Mobile Robot with Intelligence to Recognize Obstacles (장애물 인식 지능을 갖춘 자율 이동로봇의 구현)

  • 류한성;최중경
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.40 no.5
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    • pp.312-321
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    • 2003
  • In this paper, we implement robot which are ability to recognize obstacles and moving automatically to destination. we present two results in this paper; hardware implementation of image processing board and software implementation of visual feedback algorithm for a self-controlled robot. In the first part, the mobile robot depends on commands from a control board which is doing image processing part. We have studied the self controlled mobile robot system equipped with a CCD camera for a long time. This robot system consists of a image processing board implemented with DSPs, a stepping motor, a CCD camera. We will propose an algorithm in which commands are delivered for the robot to move in the planned path. The distance that the robot is supposed to move is calculated on the basis of the absolute coordinate and the coordinate of the target spot. And the image signal acquired by the CCD camera mounted on the robot is captured at every sampling time in order for the robot to automatically avoid the obstacle and finally to reach the destination. The image processing board consists of DSP (TMS320VC33), ADV611, SAA7111, ADV7l76A, CPLD(EPM7256ATC144), and SRAM memories. In the second part, the visual feedback control has two types of vision algorithms: obstacle avoidance and path planning. The first algorithm is cell, part of the image divided by blob analysis. We will do image preprocessing to improve the input image. This image preprocessing consists of filtering, edge detection, NOR converting, and threshold-ing. This major image processing includes labeling, segmentation, and pixel density calculation. In the second algorithm, after an image frame went through preprocessing (edge detection, converting, thresholding), the histogram is measured vertically (the y-axis direction). Then, the binary histogram of the image shows waveforms with only black and white variations. Here we use the fact that since obstacles appear as sectional diagrams as if they were walls, there is no variation in the histogram. The intensities of the line histogram are measured as vertically at intervals of 20 pixels. So, we can find uniform and nonuniform regions of the waveforms and define the period of uniform waveforms as an obstacle region. We can see that the algorithm is very useful for the robot to move avoiding obstacles.

Low-noise VLSI Implementation of Pipelined IIR Filters (파이프라인된 IIR 필터의 저잡음 VLSI구현)

  • 태기철;최정필;신승철;정진균
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.4B
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    • pp.788-795
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    • 2000
  • Scattered look-ahead pipelining method can be efficiently used for high sample rate or low-power applications of digital recursive filters. Although the pipelined filters are guaranteed to be stable by this method, these filters suffer from large round off noise when the poles are crowed within some critical regions. To avoid this problem, a low-noise implementation technique was proposed using constrained Remez exchange algorithm. By the constrained filter design approach, the desired filter spectrum is satisfied while some of the pole angles are constrained to avoid pole crowding within critical regions. In the proposed approach, to obtain improved spectrum characteristics or better round off noise properties, the radius of the angle-constrained pole is optimized depending on the direction of the pole movement.

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Design and Architecture of Low-Latency High-Speed Turbo Decoders

  • Jung, Ji-Won;Lee, In-Ki;Choi, Duk-Gun;Jeong, Jin-Hee;Kim, Ki-Man;Choi, Eun-A;Oh, Deock-Gil
    • ETRI Journal
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    • v.27 no.5
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    • pp.525-532
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    • 2005
  • In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de)interleaving and iterative decoding in a conventional maximum a posteriori turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is from the combination of the radix-4, center to top, parallel decoding, and early-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit error rate performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. To prove the latency reduction, we implemented the proposed scheme on a field-programmable gate array and compared its decoding speed with that of a conventional decoder. The results show an improvement of at least five fold for a single iteration of turbo decoding.

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Design and Implementation of Tripodal Schematic Control Architecture for Multi-Functional Service Robots

  • Kim, Gun-Hee;Chung, Woo-Jin;Kim, Mun-Sang;Lee, Chong-Won
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.2045-2050
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    • 2003
  • This paper describes the development of service robotic systems with the Tripodal schematic control architecture. We show practical advantages of the proposed architecture by giving examples of our experience. First, we explain how to add new task using Tripodal architecture approach. The Tripodal architecture provides some crucial organizing principles and core components that are used to build the basis for the system. Thus, the newly developed behaviors, motion algorithm, knowledge, and planning schemes are arranged so as to guarantee the efficiency of the performance of components. Second, we describe the reusability and scaleability of our architecture by introducing the implementation process of the guide robot Jinny. Most of modules developed for former robots like PSR-1 and PSR-2 systems are used directly to the Jinny system without significant modification. Experimental results clearly showed that the developed strategy is useful, even if the hardware configurations as well as software algorithms are more complex and more accumulating.

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An Implementation of Real-time Image Warping Using FPGA (FPGA를 이용한 실시간 영상 워핑 구현)

  • Ryoo, Jung Rae;Lee, Eun Sang;Doh, Tae-Yong
    • IEMEK Journal of Embedded Systems and Applications
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    • v.9 no.6
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    • pp.335-344
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    • 2014
  • As a kind of 2D spatial coordinate transform, image warping is a basic image processing technique utilized in various applications. Though image warping algorithm is composed of relatively simple operations such as memory accesses and computations of weighted average, real-time implementations on embedded vision systems suffer from limited computational power because the simple operations are iterated as many times as the number of pixels. This paper presents a real-time implementation of a look-up table(LUT)-based image warping using an FPGA. In order to ensure sufficient data transfer rate from memories storing mapping LUT and image data, appropriate memory devices are selected by analyzing memory access patterns in an LUT-based image warping using backward mapping. In addition, hardware structure of a parallel and pipelined architecture is proposed for fast computation of bilinear interpolation using fixed-point operations. Accuracy of the implemented hardware is verified using a synthesized test image, and an application to real-time lens distortion correction is exemplified.

Intelligent Lighting Control using Wireless Sensor Networks for Media Production

  • Park, Hee-Min;Burke, Jeff;Srivastava, Mani B.
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.3 no.5
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    • pp.423-443
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    • 2009
  • We present the design and implementation of a unique sensing and actuation application -- the Illuminator: a sensor network-based intelligent light control system for entertainment and media production. Unlike most sensor network applications, which focus on sensing alone, a distinctive aspect of the Illuminator is that it closes the loop from light sensing to lighting control. We describe the Illuminator's design requirements, system architecture, algorithms, implementation and experimental results. The system uses the Illumimote, a multi-modal and high fidelity light sensor module well-suited for wireless sensor networks, to satisfy the high-performance light sensing requirements of entertainment and media production applications. The Illuminator system is a toolset to characterize the illumination profile of a deployed set of fixed position lights, generate desired lighting effects for moving targets (actors, scenic elements, etc.) based on user constraints expressed in a formal language, and to assist in the set up of lights to achieve the same illumination profile in multiple venues. After characterizing deployed lights, the Illuminator computes optimal light settings at run-time to achieve a user-specified actuation profile, using an optimization framework based on a genetic algorithm. Uniquely, it can use deployed sensors to incorporate changing ambient lighting conditions and moving targets into actuation. Experimental results demonstrate that the Illuminator handles various high-level user requirements and generates an optimal light actuation profile. These results suggest that the Illuminator system supports entertainment and media production applications.

A New Packet Forwarding Architecture For Fairness Improvement in Wireless Sensor Network (무선 센서 네트워크 환경에서 공정성 향상을 위한 새로운 패킷 전송 구조)

  • Song, Byung-Hun;Lee, Hyung-Su;Ham, Kyung-Sun
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.215-217
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    • 2004
  • In wireless sensor networks, fair allocation of bandwidth among different nodes is one of the critical problems that effects the serviceability of the entire system. Fair bandwidth allocation mechanisms, like fair queuing, usually need to maintain state, manage buffers, and perform packet scheduling on a per flow basis, and this complexity may prevent them from being cost-effectively implemented and widely deployed. It is a very important and difficult technical issue to provide packet scheduling architecture for fairness in wireless sensor networks. In this paper, we propose an packet scheduling architecture for sensor node, called FISN (Fairness Improvement Sensor Network), that significantly reduces this implementation complexity yet still achieves approximately fair bandwidth allocations. Sensor node for sensing estimate the incoming rate of each sensor device and insert a label into each transmission packet header based on this estimate. Sensor node for forwarding maintain no per flow state; they use FIFO packet scheduling augmented by a probabilistic dropping algorithm that uses the packet labels and an estimate of the aggregate traffic at the gathering node. We present the detailed design, implementation, and evaluation of FISN using simulation. We discuss the fairness improvement and practical engineering challenges of implementing FISN in an experimental sensor network test bed based on ns-2.

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Real-Time DSP Implementation of Adaptive Multi-Rate with TMS320C542 board (TMS320C542보드를 이용한 Adaptive Multi-Rate 음성부호화기의 실시간 구현)

  • 박세익;전라온;이인성
    • Proceedings of the IEEK Conference
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    • 2000.09a
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    • pp.827-830
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    • 2000
  • 3GPP and ETSI adopted AMR(Adaptive Multi-Rate) as a standard for next generation IMT-2000 service. In this paper, we analyzed algorithm about AMR and optimized ANSI C source on the C complier and assembly language of Texas Instrument . The implemented AMR speech codec requires 28.2MIPS of complexity for encoder and 5.5MIPS for decoder. we performed real-time implementation of AMR speech codec using 82% of TMS320C5402 with 40 MIPS specification. We give proof that the output speech of the implemented speech codec on DSP board is identical with result of C source program simulation. Also the reconstructed speech is verified in the real-time environment consisted of microphone and speaker.

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Adaptive Control of Industrial Robot Using Neural Network (신경회로망을 이용한 산업용 로봇의 적응제어)

  • 장준화;윤정민;차보남;안병규;한성현
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2002.04a
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    • pp.387-392
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    • 2002
  • This paper presents a new scheme of neural network controller to improve the robustuous of robot manipulator using digital signal processors. Digital signal processors, DSPs, are micro-processors that are particularly developed for fast numerical computations involving sums and products of variables. Digital version of most advanced control algorithms can be defined as sums and products of measured variables, thus it can be programmed and executed through DSPs. In addition, DSPs are as fast in computation as most 32-bit micro-processors and yet at a fraction of their prices. These features make DSPs a viable computational tool in digital implementation of sophisticated controllers. During past decade it was proposed the well-established theorys for the adaptive control of linear systems, but there exists relatively little general theory for the adaptive control of nonlinear systems. Perforating of the proposed controller is illustrated. This paper describes a new approach to the design of adaptive controller and implementation of real-time control for assembling robotic manipulator using digital signal processor. Digital signal processors used in implementing real time adaptive control algorithm are TMS320C50 series made in TI'Co..

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Implementation of Auto-tuning Positive Position Feedback Controller Using DSP Chip and Microcontroller (디지털신호처리 칩과 마이크로 컨트롤러를 이용한 자동 조정 양변위 되먹임 제어기의 구현)

  • Kwak, Moon K.;Kim, Ki-Young;Bang, Se-Yoon
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.15 no.8 s.101
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    • pp.954-961
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    • 2005
  • This paper is concerned with the implementation of auto-tuning positive position feedback controller using a digital signal processor and microcontroller. The main advantage of the positive position feedback controller is that it can control a natural mode of interest by tuning the filter frequency of the positive position feedback controller to the natural frequency of the target mode. However, the positive position feedback controller loses its advantage when mistuned. In this paper, the fast fourier transform algorithm is implemented on the microcontroller whereas the positive position feedback controller is implemented on the digital signal processor. After calculating the frequency which affects the vibrations of structure most, the result is transferred to the digital signal processor. The digital signal processor updates the information on the frequency to be controlled so that it can cope with both internal and external changes. The proposed scheme was installed and tested using a beam equipped with piezoceramic sensor and actuator. The experimental results show that the auto-tuning positive position feedback controller proposed in this paper can suppress vibrations even when the target structure undergoes structural change thus validating the approach.