• Title/Summary/Keyword: implementation algorithm

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A Hardware Implementation of EGML-based Moving Object Detection Algorithm (EGML 기반 이동 객체 검출 알고리듬의 하드웨어 구현)

  • Kim, Gyeong-hun;An, Hyo-sik;Shin, Kyung-wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.10
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    • pp.2380-2388
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    • 2015
  • A hardware implementation of MOD(moving object detection) algorithm using EGML(effective Gaussian mixture learning)- based background subtraction to detect moving objects in video is described. Some approximations of EGML calculations are applied to reduce hardware complexity, and pipelining technique is adopted to improve operating speed. The MOD processor designed in Verilog-HDL has been verified by FPGA-in-the-loop verification using MATLAB/Simulink. The MOD processor has 2,218 slices on the Virtex5-XC5VSX95T FPGA device and its throughput is 102 MSamples/s at 102 MHz clock frequency. Evaluation results of the MOD processor for 12 images in the IEEE CDW-2012 dataset show that the average recall value is 0.7631, the average precision value is 0.7778 and the average F-measure value is 0.7535.

Design of FPGA Hardware Accelerator for Information Security System (정보보호 시스템을 위한 FPGA 기반 하드웨어 가속기 설계)

  • Cha, Jeong Woo;Kim, Chang Hoon
    • Journal of Korea Society of Industrial Information Systems
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    • v.18 no.2
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    • pp.1-12
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    • 2013
  • Information Security System is implemented in software, hardware and FPGA device. Implementation of S/W provides high flexibility about various information security algorithm, but it has very vulnerable aspect of speed, power, safety, and performing ASIC is really excellent aspect of speed and power but don't support various security platform because of feature's realization. To improve conflict of these problems, implementation of recent FPGA device is really performed. The goal of this thesis is to design and develop a FPGA hardware accelerator for information security system. It performs as AES, SHA-256 and ECC and is controlled by the Integrated Interface. Furthermore, since the proposed Security Information System can satisfy various requirements and some constraints, it can be applied to numerous information security applications from low-cost applications and high-speed communication systems.

A Design and Implementation Red Tide Prediction Monitoring System using Case Based Reasoning (사례 기반 추론을 이용한 적조 예측 모니터링 시스템 구현 및 설계)

  • Song, Byoung-Ho;Jung, Min-A;Lee, Sung-Ro
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.12B
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    • pp.1219-1226
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    • 2010
  • It is necessary to implementation of system contain intelligent decision making algorithm because discriminant and prediction system for Red Tide is insufficient development and the study of red tide are focused for the investigation of chemical and biological causing. In this paper, we designed inference system using case based reasoning method and implemented knowledge base that case for Red Tide. We used K-Nearest Neighbor algorithm for recommend best similar case and input 375 EA by case for Red Tide case base. As a result, conducted 10-fold cross verification for minimal impact from learning data and acquired confidence, we obtained about 84.2% average accuracy for Red Tide case and the best performance results in case by number of similarity classification k is 5. And, we implemented Red Tide monitoring system using inference result.

Design and FPGA Implementation of 5㎓ OFDM Modem for Wireless LAN (5㎓대역 OFDM 무선 LAM 모뎀 설계 및 FPGA 구현)

  • Moon Dai-Tchul;Hong Seong-Hyub
    • Journal of the Institute of Convergence Signal Processing
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    • v.5 no.4
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    • pp.333-337
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    • 2004
  • This paper describe a design of 5GHz OFDM baseband chip for IEEE 802.11a wireless LAN. The proposed device is consists of transmitter and receiver within a single FPGA chip. We applied single tap equalizer that use Normalized LMS algorithm to remove ISI that happen at high speed data transmission. And also, we used carrier wave frequency offset algorithm that use training symbol to remove ICI. The simulation results show the correct transmission without errors the between transmitter and receiver And we can remarkably reduce the number of register through the synthesized circuits by using DSP block and EMB(Embedded Memory Block). The target device for implementation of the synthesized circuits is Altera Stratix EPIS25FC672 FPGA and design platform is VHDL.

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Multi-protocol Test Method:MPTM (다중계층 프로토콜 시험 방법)

  • Lee, Soo-In;Park, Yong-Bum;Kim, Myung-Chul
    • Journal of KIISE:Information Networking
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    • v.28 no.3
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    • pp.377-388
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    • 2001
  • An approach for testing multi-protocol Implementation Under Test (IUT) with a single test suite has been proposed in[1]. this paper proposes an algorithm called Multi-protocol Test Method (MPTM) for automatic test case generation based on that approach. With the MPTM, a multi-protocol IUT consisting of two protocol layers is modeled as two Finite State Machines (FSMs), and the relationships between the transitions of the two FSMs are defined as a set of transition relationships pre-execution and carried-by. The proposed algorithm is implemented and applied to a simplified TCP/IP and B-ISDN Signaling/SSCOP. MPTM is able to test the multi-protocol IUT even though the interfaces between the protocol layers are not exposed. It results in that the proposed MPTM allows the same test coverage as conventional test methods even with fewer numbers of test cases.

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Design and Implementation of FPGA Based Real-Time Adaptive Beamformer for AESA Radar Applications (능동위상배열 레이더 적용을 위한 FPGA 기반 실시간 적응 빔 형성기 설계 및 구현)

  • Kim, Dong-Hwan;Kim, Eun-Hee;Park, Jong-Heon;Kim, Seon-Joo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.4
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    • pp.424-434
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    • 2015
  • Adaptive beamforming algorithms have been widely used to remove interference and jamming in the phased array radar system. Advances in the field programmable gate array(FPGA) technology now make possible the real time processing of adaptive beamforming (ABF) algorithm. In this paper, the FPGA based real-time implementation method of adaptive beamforming system(beamformer) in the pre-processor module for active electronically scanned array(AESA) radar is proposed. A compact FPGA-based adaptive beamformer is developed using commercial off the shelf(COTS) FPGA board with communication via OpenVPX(Virtual Path Cross-connect) backplane. This beamformer comprises a number of high speed complex processing including QR decomposition & back substitution for matrix inversion and complex vector/matrix calculations. The implemented result shows that the adaptive beamforming patterns through FPGA correspond with results of simulation through Matlab. And also confirms the possibility of application in AESA radar due to the real time processing of ABF algorithm through FPGA.

Design of MUSIC-based DoA Estimator for Bluetooth Applications (Bluetooth 응용을 위한 MUSIC 알고리즘 기반 DoA 추정기의 설계)

  • Kim, Jongmin;Oh, Dongjae;Park, Sanghoon;Lee, Seunghyeok;Jung, Yunho
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.339-346
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    • 2020
  • In this paper, we propose an angle estimator that is designed to be applied to Bluetooth low-power application technology based on multiple signal classification (MUSIC) algorithm, and present the result of implementation in FPGA. The MUSIC algorithm is designed for H/W high-speed design because it requires a lot of calculations due to high accuracy, and the snapshot variable is designed to cope with various resolution requirements of indoor systems. As a result of the implementation with Xilinx zynq-7000, it was confirmed that 9,081 LUTs were implemented, and it was designed to operate at =the operating frequency of 100MHz.

An Efficient Hardware Implementation of Lightweight Block Cipher Algorithm CLEFIA for IoT Security Applications (IoT 보안 응용을 위한 경량 블록 암호 CLEFIA의 효율적인 하드웨어 구현)

  • Bae, Gi-chur;Shin, Kyung-wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.351-358
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    • 2016
  • This paper describes an efficient hardware implementation of lightweight block cipher algorithm CLEFIA. The CLEFIA crypto-processor supports for three master key lengths of 128/192/256-bit, and it is based on the modified generalized Feistel network (GFN). To minimize hardware complexity, a unified processing unit with 8 bits data-path is designed for implementing GFN that computes intermediate keys to be used in round key scheduling, as well as carries out round transformation. The GFN block in our design is reconfigured not only for performing 4-branch GFN used for round transformation and intermediate round key generation of 128-bit, but also for performing 8-branch GFN used for intermediate round key generation of 256-bit. The CLEFIA crypto-processor designed in Verilog HDL was verified by using Virtex5 XC5VSX50T FPGA device. The estimated throughput is 81.5 ~ 60 Mbps with 112 MHz clock frequency.

A Study on the Curved Form Generation Methodology of the Brick Architecture by Stretcher Bond - Focused on the Parametric Design Process - (길이쌓기에 따른 벽돌건축의 곡면형태 생성방법에 관한 연구 - 파라메트릭 디자인 프로세스를 중심으로 -)

  • Cho, Heayon;Lee, Hyunsoo
    • Korean Institute of Interior Design Journal
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    • v.26 no.6
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    • pp.163-171
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    • 2017
  • Brick is not only aesthetically beautiful and emotional material, but also eco-friendly and good building commodity for human health. Nonetheless, the use of brick has declined, due to the difficulty of building high-rise buildings and the limitation of the free form implementation. However, modern society is increasingly interested in environmentally friendly finishing materials for solving environmental problems. From this point of view, the brick architecture is being reexamined as a material to improve the living environment and to provide comfort without destroying nature. In addition, the development of digital technology enables the implementation of various types of masonry method and curved forms. Parametric design is one of the ways to realize the curved forms and various architectural expressions for brick architecture. In this background, the purpose of this study is to develop algorithms that can easily generate curved brick walls through parametric design, enable various pattern designs, and respond to real-time feedback. The details of the study are as follows. First of all, we examine organic architecture, the trend of brick architecture, and the concept of parametric design. Secondly, In order to generate curved surface with complex curvature, major planning factors affecting form generation are examined. Finally, we develop a parametric design method that consists of generating a curved surface for brick arrangement, implementing a parametric algorithm, and generating a curved form using bricks. Consequentially, we propose an algorithm that can maximize the use of ready-made bricks without using cut bricks to design curved walls and present efficient and economical design alternatives.

Development of Adaptive Eye Tracking System Using Auto-Focusing Technology of Camera (눈동자 자동 추적 카메라 시스템 설계와 구현)

  • Wei, Zukuan;Liu, Xiaolong;Oh, Young-Hwan;Yook, Ju-Hye
    • Journal of Digital Contents Society
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    • v.13 no.2
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    • pp.159-167
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    • 2012
  • Eye tracking technology tracks human eyes movements to understand user's intention. This technology has been improving slowly and should be used for a variety of occasions now. For example, it enables persons with disabilities to operate a computer with their eyes. This article will show a typical implementation of an eye tracking system for persons with disabilities, after introducing the design principles and specific implementation details of an eye tracking system. The article discussed the realization of self-adapting regulation algorithm in detail. The self-adapting algorithm is based on feedback signal controlling the lens movements to realize automatic focus, and to get a clear eyes image. This CCD camera automatic focusing method has self-adapting capacity for changes of light intensity on the external environment. It also avoids the trouble of manual adjustment and improves the accuracy of the adjustment.