• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.1
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• pp.261-269
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• 2014

There are many researches on fast exponentiation algorithm which is used to implement a public key cryptosystem such as RSA. On the other hand, the malicious attacker has tried various side-channel attacks to extract the secret key. In these attacks, an attacker uses the power consumption or electromagnetic radiation of cryptographic devices which is measured during computation of exponentiation algorithm. In this paper, we propose a novel simple power analysis attack on m-ary exponentiation implementation. The core idea of our attack on m-ary exponentiation with pre-computation process is that an attacker controls the input message to identify the power consumption patterns which are related with secret key. Furthermore, we implement the m-ary exponentiation on evaluation board and apply our simple power analysis attack to it. As a result, we verify that the secret key can be revealed in experimental environment.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.11
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• pp.2365-2373
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• 2011

This paper propose the hardware IP of real-time face detection system for mobile devices and digital cameras required for high speed, smaller size and lower power. The proposed face detection system is robust against illumination changes, face size, and various face angles as the main cause of the face detection performance. Input image is transformed to LBP(Local Binary Pattern) image to obtain face characteristics robust against illumination changes, and detected the face using face feature data that was adopted to learn and generate in the various face angles using the Adaboost algorithm. The proposed face detection system can be detected maximum 36 faces at the input image size of QVGA($320{\times}240$), and designed by Verilog-HDL. Also, it was verified hardware implementation by using Virtex5 XC5VLX330 FPGA board and HD CMOS image sensor(CIS) for FPGA verification.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.8
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• pp.35-45
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• 1999

In this paper, the addition and the multiplicative algorithm of two polynomials over finite field $GF(p^m)$ are presented. The 4-valued arithmetic processor of the serial input-parallel output modular structure on $GF(4^3)$ to be performed the presented algorithm is implemented by current mode CMOS. This 4-valued arithmetic processor using current mode CMOS is implemented one addition/multiplication selection circuit and three operation circuits; mod(4) multiplicative operation circuit, MOD operation circuit made by two mod(4) addition operation circuits, and primitive irreducible polynomial operation circuit to be performing same operation as mod(4) multiplicative operation circuit. These operation circuits are simulated under $2{\mu}m$ CMOS standard technology, $15{\mu}A$ unit current, and 3.3V VDD voltage using PSpice. The simulation results have shown the satisfying current characteristics. The presented 4-valued arithmetic processor using current mode CMOS is simple and regular for wire routing and possesses the property of modularity. Also, it is expansible for the addition and the multiplication of two polynomials on finite field increasing the degree m and suitable for VLSI implementation.

• KIISE Transactions on Computing Practices
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• v.22 no.7
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• pp.303-309
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• 2016

Recently, an increasing number of embedded processors such as ARM Mali begin to support GPGPU programming frameworks, such as OpenCL. Thus, GPGPU technologies that have been used in PC and server environments are beginning to be applied to the embedded systems. However, many embedded systems have different architectural characteristics compare to traditional PCs and low-power consumption and real-time performance are also important performance metrics in these systems. In this paper, we implement a parallel AES cryptographic algorithm for a modern embedded GPU using OpenCL, a standard parallel computing framework, and compare performance against various baselines. Experimental results show that the parallel GPU AES implementation can reduce the response time by about 1/150 and the energy consumption by approximately 1/290 compare to OpenMP implementation when 1000KB input data is applied. Furthermore, an additional 100 % performance improvement of the parallel AES algorithm was achieved by exploiting the characteristics of embedded GPUs such as removing copying data between GPU and host memory. Our results also demonstrate that higher performance improvement can be achieved with larger size of input data.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.4
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• pp.491-497
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• 2015

In this paper a method of design and Implementation of RFID based control system for reducing standby power consumption at the power outlet is described. The system is composed of a RF controlled power outlet having relay and an active RFID tag communicating with the RF reader module controlling the relay. When the tag carried by human approaches to the RF reader the reader recognizes the tag and switch off the relay based on the RSSI level measurement. A low power packet prediction algorithm has been used to decrease the DC power consumption at both the tag and the RF reader. The result of experiment shows that successful operation of the relay control has been obtained while low power operation of the tag and the reader is achieved using above algorithm. Also setting the distance between the reader and the tag by controlling transmission power of the tag and adjusting the duty cycle of the packet waiting time when the reader is in idle state allows us to reduce DC power consumption at both the reader and the tag.

• Korean Journal of Remote Sensing
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• v.31 no.3
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• pp.245-253
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• 2015

According to wide civilian utilization of multi sensor satellite information, practical needs for fusion processing and interoperable operation with multiple remote sensing imageries within distributed remote server are being increased. For this task, OGC standards with respect to satellite images and its derived products are crucial factors. This study is to present an applicability of WPS through testing implementation of image processing algorithm. Open sources such as Geoserver and OTB were used linked to WPS application for implementation. WPS can be solely used for web service supporting geoprocessing algorithm, but technical consideration compromising with other important standard protocols including WMS, WFS, WCS, or WMTS is necessary to build full featured geo web for remote sensing imageries. It is expected that application of these international standards for geo-spatial information is an important approach to produce value-added results by interoperable processing between interorganizations or information dissemination containing practical satellite image processing functionalities.

• Industrial Engineering and Management Systems
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• v.8 no.3
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• pp.181-193
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• 2009

This paper presents a framework for controlling mobile multiple robots connected by communication networks. This framework provides novel methods to control coordinated systems using mobile agents. The combination of the mobile agent and mobile multiple robots opens a new horizon of efficient use of mobile robot resources. Instead of physical movement of multiple robots, mobile software agents can migrate from one robot to another so that they can minimize energy consumption in aggregation. The imaginary application is making "carts," such as found in large airports, intelligent. Travelers pick up carts at designated points but leave them arbitrary places. It is a considerable task to re-collect them. It is, therefore, desirable that intelligent carts (intelligent robots) draw themselves together automatically. Simple implementation may be making each cart has a designated assembly point, and when they are free, automatically return to those points. It is easy to implement, but some carts have to travel very long way back to their own assembly point, even though it is located close to some other assembly points. It consumes too much unnecessary energy so that the carts have to have expensive batteries. In order to ameliorate the situation, we employ mobile software agents to locate robots scattered in a field, e.g. an airport, and make them autonomously determine their moving behaviors by using a clustering algorithm based on the Ant Colony Optimization (ACO). ACO is the swarm intelligence-based methods, and a multi-agent system that exploit artificial stigmergy for the solution of combinatorial optimization problems. Preliminary experiments have provided a favorable result. In this paper, we focus on the implementation of the controlling mechanism of the multi-robots using the mobile agents.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.37 no.5
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• pp.441-448
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• 2013

This paper presents the fast multipole boundary element method (FM-BEM) as a new BEM solution methodology that overcomes many disadvantages of conventional BEM. In conventional BEM, large-scale problems cannot be treated easily because the computation time increases rapidly with an increase in the number of boundary elements owing to the dense coefficient matrix. Analysis results are obtained to compare FM-BEM with conventional BEM in terms of computation time and accuracy for a simple two-dimensional steady-state heat conduction problem. It is confirmed that the FM-BEM solution methodology greatly enhances the computation speed while maintaining solution accuracy similar to that of conventional BEM. As a result, the theory and implementation algorithm of FM-BEM are discussed in this study.

• Journal of Broadcast Engineering
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• v.3 no.1
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• pp.85-92
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• 1998

The block matching algorithm is the most popular motion estimation method in image sequence coding. In this paper, we propose a VLSI architecture. for implementing a recently proposed fast bolck matching algorith, which uses spatial correlation of motion vectors and hierarchical searching scheme. The proposed architecture consists of a basic searching unit based on a systolic array and two shift register arrays. And it covers a search range of -32~ +31. By using the basic searching unit repeatedly, it reduces the number of gatyes for implementation. For basic searching unit implementation, a proper systolic array can be selected among various conventional ones by trading-off between speed and hardware cost. In this paper, a structure is selected as the basic searching unit so that the hardware cost can be minimized. The proposed overall architecture is fast enough for low bit-rate applications (frame size of $352{\times}288$, 3Oframes/sec) and can be implemented by less than 20,000 gates. Moreover, by simply modifying the basic searching unit, the architecture can be used for the higher bit-rate application of the frame size of $720{\times}480$ and 30 frames/sec.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.2
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• pp.517-524
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• 2010

Recently, the size of online texts and textual information is increasing explosively, and the automated classification has a great potential for handling data such as news materials and images. Text classification system is based on supervised learning which needs laborous work by human expert. The main goal of this paper is to reduce the manual intervention, required for the task. The other goal is to increase accuracy to be high. Most of the documents have high complexity in contents and the high similarities in their described style. So, the classification results are not satisfactory. This paper shows the implementation of classification system based on ETOM+RPost algorithm and classification progress using SPAM data. In experiments, we verified our system with right-training documents and wrong-training documents. The experimental results show that our system has high accuracy and stability in all situation as 16% improvement in accuracy.